First upgrade step: fix schematic
Create new symbol for ethernet jack, previous one was not migrated. Fix library names for remaining parts. Rename all project files to their new .kicad_* suffix.
This commit is contained in:
parent
e787d6e9c4
commit
1511925247
52
dsoxlan.cmp
52
dsoxlan.cmp
|
@ -1,52 +0,0 @@
|
|||
Cmp-Mod V01 Created by Cvpcb 0.201412111631+5320~19~ubuntu14.04.1-product date = Sat 13 Dec 2014 11:19:44 PM EET
|
||||
|
||||
BeginCmp
|
||||
TimeStamp = /548C8674;
|
||||
Reference = C1;
|
||||
ValeurCmp = 1n;
|
||||
IdModule = Capacitors_SMD:C_0805_HandSoldering;
|
||||
EndCmp
|
||||
|
||||
BeginCmp
|
||||
TimeStamp = /548C8996;
|
||||
Reference = C2;
|
||||
ValeurCmp = 1n;
|
||||
IdModule = Capacitors_SMD:C_0805_HandSoldering;
|
||||
EndCmp
|
||||
|
||||
BeginCmp
|
||||
TimeStamp = /548C86EB;
|
||||
Reference = P1;
|
||||
ValeurCmp = CNT-RJ45;
|
||||
IdModule = awallin:ETH-MAGJACK;
|
||||
EndCmp
|
||||
|
||||
BeginCmp
|
||||
TimeStamp = /548C918C;
|
||||
Reference = P2;
|
||||
ValeurCmp = CONN_02X40;
|
||||
IdModule = awallin:cardedge_40x2;
|
||||
EndCmp
|
||||
|
||||
BeginCmp
|
||||
TimeStamp = /548C8849;
|
||||
Reference = R1;
|
||||
ValeurCmp = 220R;
|
||||
IdModule = Resistors_SMD:R_0805_HandSoldering;
|
||||
EndCmp
|
||||
|
||||
BeginCmp
|
||||
TimeStamp = /548C8821;
|
||||
Reference = R2;
|
||||
ValeurCmp = 220R;
|
||||
IdModule = Resistors_SMD:R_0805_HandSoldering;
|
||||
EndCmp
|
||||
|
||||
BeginCmp
|
||||
TimeStamp = /548C8A5B;
|
||||
Reference = R3;
|
||||
ValeurCmp = 10R;
|
||||
IdModule = Resistors_SMD:R_0805_HandSoldering;
|
||||
EndCmp
|
||||
|
||||
EndListe
|
80
dsoxlan.kicad_prl
Normal file
80
dsoxlan.kicad_prl
Normal file
|
@ -0,0 +1,80 @@
|
|||
{
|
||||
"board": {
|
||||
"active_layer": 0,
|
||||
"active_layer_preset": "",
|
||||
"auto_track_width": true,
|
||||
"hidden_netclasses": [],
|
||||
"hidden_nets": [],
|
||||
"high_contrast_mode": 0,
|
||||
"net_color_mode": 1,
|
||||
"opacity": {
|
||||
"images": 0.6,
|
||||
"pads": 1.0,
|
||||
"tracks": 1.0,
|
||||
"vias": 1.0,
|
||||
"zones": 0.6
|
||||
},
|
||||
"selection_filter": {
|
||||
"dimensions": true,
|
||||
"footprints": true,
|
||||
"graphics": true,
|
||||
"keepouts": true,
|
||||
"lockedItems": false,
|
||||
"otherItems": true,
|
||||
"pads": true,
|
||||
"text": true,
|
||||
"tracks": true,
|
||||
"vias": true,
|
||||
"zones": true
|
||||
},
|
||||
"visible_items": [
|
||||
0,
|
||||
1,
|
||||
2,
|
||||
3,
|
||||
4,
|
||||
5,
|
||||
6,
|
||||
7,
|
||||
8,
|
||||
9,
|
||||
10,
|
||||
11,
|
||||
12,
|
||||
13,
|
||||
14,
|
||||
15,
|
||||
16,
|
||||
17,
|
||||
18,
|
||||
19,
|
||||
20,
|
||||
21,
|
||||
22,
|
||||
23,
|
||||
24,
|
||||
25,
|
||||
26,
|
||||
27,
|
||||
28,
|
||||
29,
|
||||
30,
|
||||
32,
|
||||
33,
|
||||
34,
|
||||
35,
|
||||
36,
|
||||
39,
|
||||
40
|
||||
],
|
||||
"visible_layers": "fffffff_ffffffff",
|
||||
"zone_display_mode": 0
|
||||
},
|
||||
"meta": {
|
||||
"filename": "dsoxlan.kicad_prl",
|
||||
"version": 3
|
||||
},
|
||||
"project": {
|
||||
"files": []
|
||||
}
|
||||
}
|
793
dsoxlan.kicad_pro
Normal file
793
dsoxlan.kicad_pro
Normal file
|
@ -0,0 +1,793 @@
|
|||
{
|
||||
"board": {
|
||||
"3dviewports": [],
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.09999999999999999,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 1.016,
|
||||
"height": 1.524,
|
||||
"width": 1.524
|
||||
},
|
||||
"silk_line_width": 0.15,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"min_clearance": 0.508
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"filename": "board_design_settings.json",
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"connection_width": "warning",
|
||||
"copper_edge_clearance": "error",
|
||||
"copper_sliver": "warning",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint": "error",
|
||||
"footprint_type_mismatch": "ignore",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"isolated_copper": "warning",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"lib_footprint_issues": "warning",
|
||||
"lib_footprint_mismatch": "warning",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "warning",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_edge_clearance": "warning",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"solder_mask_bridge": "error",
|
||||
"starved_thermal": "error",
|
||||
"text_height": "warning",
|
||||
"text_thickness": "warning",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rules": {
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_connection": 0.0,
|
||||
"min_copper_edge_clearance": 0.049999999999999996,
|
||||
"min_hole_clearance": 0.25,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.508,
|
||||
"min_microvia_drill": 0.127,
|
||||
"min_resolved_spokes": 2,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_text_height": 0.7999999999999999,
|
||||
"min_text_thickness": 0.08,
|
||||
"min_through_hole_diameter": 0.508,
|
||||
"min_track_width": 0.254,
|
||||
"min_via_annular_width": 0.09999999999999999,
|
||||
"min_via_diameter": 0.889,
|
||||
"solder_mask_to_copper_clearance": 0.0,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"teardrop_options": [
|
||||
{
|
||||
"td_allow_use_two_tracks": true,
|
||||
"td_curve_segcount": 5,
|
||||
"td_on_pad_in_zone": false,
|
||||
"td_onpadsmd": true,
|
||||
"td_onroundshapesonly": false,
|
||||
"td_ontrackend": false,
|
||||
"td_onviapad": true
|
||||
}
|
||||
],
|
||||
"teardrop_parameters": [
|
||||
{
|
||||
"td_curve_segcount": 0,
|
||||
"td_height_ratio": 1.0,
|
||||
"td_length_ratio": 0.5,
|
||||
"td_maxheight": 2.0,
|
||||
"td_maxlen": 1.0,
|
||||
"td_target_name": "td_round_shape",
|
||||
"td_width_to_size_filter_ratio": 0.9
|
||||
},
|
||||
{
|
||||
"td_curve_segcount": 0,
|
||||
"td_height_ratio": 1.0,
|
||||
"td_length_ratio": 0.5,
|
||||
"td_maxheight": 2.0,
|
||||
"td_maxlen": 1.0,
|
||||
"td_target_name": "td_rect_shape",
|
||||
"td_width_to_size_filter_ratio": 0.9
|
||||
},
|
||||
{
|
||||
"td_curve_segcount": 0,
|
||||
"td_height_ratio": 1.0,
|
||||
"td_length_ratio": 0.5,
|
||||
"td_maxheight": 2.0,
|
||||
"td_maxlen": 1.0,
|
||||
"td_target_name": "td_track_end",
|
||||
"td_width_to_size_filter_ratio": 0.9
|
||||
}
|
||||
],
|
||||
"track_widths": [],
|
||||
"via_dimensions": [],
|
||||
"zones_allow_external_fillets": false
|
||||
},
|
||||
"layer_presets": [],
|
||||
"viewports": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"pin_map": [
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"conflicting_netclasses": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"endpoint_off_grid": "warning",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"missing_bidi_pin": "warning",
|
||||
"missing_input_pin": "warning",
|
||||
"missing_power_pin": "error",
|
||||
"missing_unit": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"simulation_model_issue": "error",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "dsoxlan.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12,
|
||||
"clearance": 0.254,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.508,
|
||||
"microvia_drill": 0.127,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.5,
|
||||
"via_diameter": 1.2,
|
||||
"via_drill": 0.8,
|
||||
"wire_width": 6
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 3
|
||||
},
|
||||
"net_colors": null,
|
||||
"netclass_assignments": null,
|
||||
"netclass_patterns": [
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "+3V3"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "GND"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "LED1"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "LED2"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(C2-Pad2)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P1-Pad11)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P1-Pad13)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P1-Pad7)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad1)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad10)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad11)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad12)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad13)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad14)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad15)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad16)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad17)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad18)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad19)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad2)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad20)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad21)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad22)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad23)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad24)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad25)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad26)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad27)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad28)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad29)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad3)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad30)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad31)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad32)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad33)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad34)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad35)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad36)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad37)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad38)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad39)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad4)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad40)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad41)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad42)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad44)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad45)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad46)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad5)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad56)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad58)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad59)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad6)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad60)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad61)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad62)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad64)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad65)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad66)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad67)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad68)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad69)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad7)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad70)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad71)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad72)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad73)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad74)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad75)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad76)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad77)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad78)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad79)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad8)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "Net-(P2-Pad9)"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "RX+"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "RX-"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "TX+"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "TX-"
|
||||
}
|
||||
]
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
"dashed_lines_dash_length_ratio": 12.0,
|
||||
"dashed_lines_gap_length_ratio": 3.0,
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 60.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.25,
|
||||
"pin_symbol_size": 0.0,
|
||||
"text_offset_ratio": 0.08
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "",
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"spice_current_sheet_as_root": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"spice_model_current_sheet_as_root": true,
|
||||
"spice_save_all_currents": false,
|
||||
"spice_save_all_voltages": false,
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"071cacbe-efce-4cc8-8d6c-a55997c1e3c5",
|
||||
""
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
1898
dsoxlan.kicad_sch
Normal file
1898
dsoxlan.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
136
dsoxlan.kicad_sym
Normal file
136
dsoxlan.kicad_sym
Normal file
|
@ -0,0 +1,136 @@
|
|||
(kicad_symbol_lib (version 20220914) (generator kicad_symbol_editor)
|
||||
(symbol "CNT-RJ45" (in_bom yes) (on_board yes)
|
||||
(property "Reference" "P?" (at 3.81 21.59 0)
|
||||
(effects (font (size 1.27 1.27)))
|
||||
)
|
||||
(property "Value" "" (at -3.81 6.35 0)
|
||||
(effects (font (size 1.27 1.27)))
|
||||
)
|
||||
(property "Footprint" "" (at -3.81 6.35 0)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(property "Datasheet" "" (at -3.81 6.35 0)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(symbol "CNT-RJ45_0_1"
|
||||
(rectangle (start -5.08 20.32) (end 6.35 -22.86)
|
||||
(stroke (width 0) (type default))
|
||||
(fill (type none))
|
||||
)
|
||||
(polyline
|
||||
(pts
|
||||
(xy -1.27 -16.51)
|
||||
(xy 1.27 -16.51)
|
||||
)
|
||||
(stroke (width 0) (type default))
|
||||
(fill (type none))
|
||||
)
|
||||
(polyline
|
||||
(pts
|
||||
(xy -1.27 -8.89)
|
||||
(xy 1.27 -8.89)
|
||||
)
|
||||
(stroke (width 0) (type default))
|
||||
(fill (type none))
|
||||
)
|
||||
(polyline
|
||||
(pts
|
||||
(xy -1.27 -15.24)
|
||||
(xy 1.27 -15.24)
|
||||
(xy 0 -16.51)
|
||||
(xy -1.27 -15.24)
|
||||
)
|
||||
(stroke (width 0) (type default))
|
||||
(fill (type none))
|
||||
)
|
||||
(polyline
|
||||
(pts
|
||||
(xy -1.27 -7.62)
|
||||
(xy 1.27 -7.62)
|
||||
(xy 0 -8.89)
|
||||
(xy -1.27 -7.62)
|
||||
)
|
||||
(stroke (width 0) (type default))
|
||||
(fill (type none))
|
||||
)
|
||||
(polyline
|
||||
(pts
|
||||
(xy 2.54 -13.97)
|
||||
(xy 0 -13.97)
|
||||
(xy 0 -17.78)
|
||||
(xy 2.54 -17.78)
|
||||
)
|
||||
(stroke (width 0) (type default))
|
||||
(fill (type none))
|
||||
)
|
||||
(polyline
|
||||
(pts
|
||||
(xy 2.54 -6.35)
|
||||
(xy 0 -6.35)
|
||||
(xy 0 -10.16)
|
||||
(xy 2.54 -10.16)
|
||||
)
|
||||
(stroke (width 0) (type default))
|
||||
(fill (type none))
|
||||
)
|
||||
)
|
||||
(symbol "CNT-RJ45_1_1"
|
||||
(pin passive line (at 8.89 15.24 180) (length 2.54)
|
||||
(name "1" (effects (font (size 1.27 1.27))))
|
||||
(number "1" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin passive line (at 0 -25.4 90) (length 2.54)
|
||||
(name "Shield" (effects (font (size 1.27 1.27))))
|
||||
(number "10" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin passive line (at 8.89 -6.35 180) (length 2.54)
|
||||
(name "D1" (effects (font (size 1.27 1.27))))
|
||||
(number "11" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin passive line (at 8.89 -10.16 180) (length 2.54)
|
||||
(name "D2" (effects (font (size 1.27 1.27))))
|
||||
(number "12" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin passive line (at 8.89 -13.97 180) (length 2.54)
|
||||
(name "D3" (effects (font (size 1.27 1.27))))
|
||||
(number "13" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin passive line (at 8.89 -17.78 180) (length 2.54)
|
||||
(name "D4" (effects (font (size 1.27 1.27))))
|
||||
(number "14" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin passive line (at 8.89 12.7 180) (length 2.54)
|
||||
(name "2" (effects (font (size 1.27 1.27))))
|
||||
(number "2" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin passive line (at 8.89 10.16 180) (length 2.54)
|
||||
(name "3" (effects (font (size 1.27 1.27))))
|
||||
(number "3" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin passive line (at 8.89 7.62 180) (length 2.54)
|
||||
(name "4" (effects (font (size 1.27 1.27))))
|
||||
(number "4" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin passive line (at 8.89 5.08 180) (length 2.54)
|
||||
(name "5" (effects (font (size 1.27 1.27))))
|
||||
(number "5" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin passive line (at 8.89 2.54 180) (length 2.54)
|
||||
(name "6" (effects (font (size 1.27 1.27))))
|
||||
(number "6" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin passive line (at 8.89 0 180) (length 2.54)
|
||||
(name "7" (effects (font (size 1.27 1.27))))
|
||||
(number "7" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin passive line (at 8.89 -2.54 180) (length 2.54)
|
||||
(name "8" (effects (font (size 1.27 1.27))))
|
||||
(number "8" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
(pin passive line (at 0 22.86 270) (length 2.54)
|
||||
(name "Shield" (effects (font (size 1.27 1.27))))
|
||||
(number "9" (effects (font (size 1.27 1.27))))
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
366
dsoxlan.net
366
dsoxlan.net
|
@ -1,366 +0,0 @@
|
|||
(export (version D)
|
||||
(design
|
||||
(source /home/anders/Dropbox/dsox/dsoxlan/dsoxlan.sch)
|
||||
(date "Sun 14 Dec 2014 12:08:36 AM EET")
|
||||
(tool "Eeschema 0.201412111631+5320~19~ubuntu14.04.1-product"))
|
||||
(components
|
||||
(comp (ref P1)
|
||||
(value CNT-RJ45)
|
||||
(footprint awallin:ETH-MAGJACK)
|
||||
(libsource (lib conn) (part CNT-RJ45))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 548C86EB))
|
||||
(comp (ref R2)
|
||||
(value 220R)
|
||||
(footprint Resistors_SMD:R_0805_HandSoldering)
|
||||
(libsource (lib device) (part R))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 548C8821))
|
||||
(comp (ref R1)
|
||||
(value 220R)
|
||||
(footprint Resistors_SMD:R_0805_HandSoldering)
|
||||
(libsource (lib device) (part R))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 548C8849))
|
||||
(comp (ref C2)
|
||||
(value 1n)
|
||||
(footprint Capacitors_SMD:C_0805_HandSoldering)
|
||||
(libsource (lib device) (part C))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 548C8996))
|
||||
(comp (ref R3)
|
||||
(value 10R)
|
||||
(footprint Resistors_SMD:R_0805_HandSoldering)
|
||||
(libsource (lib device) (part R))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 548C8A5B))
|
||||
(comp (ref P2)
|
||||
(value CONN_02X40)
|
||||
(footprint awallin:cardedge_40x2)
|
||||
(libsource (lib conn) (part CONN_02X40))
|
||||
(sheetpath (names /) (tstamps /))
|
||||
(tstamp 548C918C)))
|
||||
(libparts
|
||||
(libpart (lib device) (part C)
|
||||
(description "Condensateur non polarise")
|
||||
(footprints
|
||||
(fp SM*)
|
||||
(fp C?)
|
||||
(fp C1-1))
|
||||
(fields
|
||||
(field (name Reference) C)
|
||||
(field (name Value) C))
|
||||
(pins
|
||||
(pin (num 1) (name ~) (type passive))
|
||||
(pin (num 2) (name ~) (type passive))))
|
||||
(libpart (lib device) (part R)
|
||||
(description Resistance)
|
||||
(footprints
|
||||
(fp R?)
|
||||
(fp SM0603)
|
||||
(fp SM0805)
|
||||
(fp R?-*)
|
||||
(fp SM1206))
|
||||
(fields
|
||||
(field (name Reference) R)
|
||||
(field (name Value) R))
|
||||
(pins
|
||||
(pin (num 1) (name ~) (type passive))
|
||||
(pin (num 2) (name ~) (type passive))))
|
||||
(libpart (lib conn) (part CNT-RJ45)
|
||||
(description "Symbole general de connexion")
|
||||
(fields
|
||||
(field (name Reference) P)
|
||||
(field (name Value) CNT-RJ45))
|
||||
(pins
|
||||
(pin (num 1) (name P1) (type passive))
|
||||
(pin (num 2) (name P2) (type passive))
|
||||
(pin (num 3) (name P3) (type passive))
|
||||
(pin (num 4) (name P4) (type passive))
|
||||
(pin (num 5) (name P5) (type passive))
|
||||
(pin (num 6) (name P6) (type passive))
|
||||
(pin (num 7) (name P7) (type passive))
|
||||
(pin (num 8) (name P8) (type passive))
|
||||
(pin (num 9) (name P9) (type passive))
|
||||
(pin (num 10) (name P10) (type passive))
|
||||
(pin (num 11) (name P11) (type passive))
|
||||
(pin (num 12) (name P12) (type passive))
|
||||
(pin (num 13) (name P13) (type passive))
|
||||
(pin (num 14) (name P14) (type passive))))
|
||||
(libpart (lib conn) (part CONN_02X40)
|
||||
(footprints
|
||||
(fp Pin_Header_Straight_2X40)
|
||||
(fp Pin_Header_Angled_2X40)
|
||||
(fp Socket_Strip_Straight_2X40)
|
||||
(fp Socket_Strip_Angled_2X40))
|
||||
(fields
|
||||
(field (name Reference) P)
|
||||
(field (name Value) CONN_02X40))
|
||||
(pins
|
||||
(pin (num 1) (name P1) (type passive))
|
||||
(pin (num 2) (name P2) (type passive))
|
||||
(pin (num 3) (name P3) (type passive))
|
||||
(pin (num 4) (name P4) (type passive))
|
||||
(pin (num 5) (name P5) (type passive))
|
||||
(pin (num 6) (name P6) (type passive))
|
||||
(pin (num 7) (name P7) (type passive))
|
||||
(pin (num 8) (name P8) (type passive))
|
||||
(pin (num 9) (name P9) (type passive))
|
||||
(pin (num 10) (name P10) (type passive))
|
||||
(pin (num 11) (name P11) (type passive))
|
||||
(pin (num 12) (name P12) (type passive))
|
||||
(pin (num 13) (name P13) (type passive))
|
||||
(pin (num 14) (name P14) (type passive))
|
||||
(pin (num 15) (name P15) (type passive))
|
||||
(pin (num 16) (name P16) (type passive))
|
||||
(pin (num 17) (name P17) (type passive))
|
||||
(pin (num 18) (name P18) (type passive))
|
||||
(pin (num 19) (name P19) (type passive))
|
||||
(pin (num 20) (name P20) (type passive))
|
||||
(pin (num 21) (name P21) (type passive))
|
||||
(pin (num 22) (name P22) (type passive))
|
||||
(pin (num 23) (name P23) (type passive))
|
||||
(pin (num 24) (name P24) (type passive))
|
||||
(pin (num 25) (name P25) (type passive))
|
||||
(pin (num 26) (name P26) (type passive))
|
||||
(pin (num 27) (name P27) (type passive))
|
||||
(pin (num 28) (name P28) (type passive))
|
||||
(pin (num 29) (name P29) (type passive))
|
||||
(pin (num 30) (name P30) (type passive))
|
||||
(pin (num 31) (name P31) (type passive))
|
||||
(pin (num 32) (name P32) (type passive))
|
||||
(pin (num 33) (name P33) (type passive))
|
||||
(pin (num 34) (name P34) (type passive))
|
||||
(pin (num 35) (name P35) (type passive))
|
||||
(pin (num 36) (name P36) (type passive))
|
||||
(pin (num 37) (name P37) (type passive))
|
||||
(pin (num 38) (name P38) (type passive))
|
||||
(pin (num 39) (name P39) (type passive))
|
||||
(pin (num 40) (name P40) (type passive))
|
||||
(pin (num 41) (name P41) (type passive))
|
||||
(pin (num 42) (name P42) (type passive))
|
||||
(pin (num 43) (name P43) (type passive))
|
||||
(pin (num 44) (name P44) (type passive))
|
||||
(pin (num 45) (name P45) (type passive))
|
||||
(pin (num 46) (name P46) (type passive))
|
||||
(pin (num 47) (name P47) (type passive))
|
||||
(pin (num 48) (name P48) (type passive))
|
||||
(pin (num 49) (name P49) (type passive))
|
||||
(pin (num 50) (name P50) (type passive))
|
||||
(pin (num 51) (name P51) (type passive))
|
||||
(pin (num 52) (name P52) (type passive))
|
||||
(pin (num 53) (name P53) (type passive))
|
||||
(pin (num 54) (name P54) (type passive))
|
||||
(pin (num 55) (name P55) (type passive))
|
||||
(pin (num 56) (name P56) (type passive))
|
||||
(pin (num 57) (name P57) (type passive))
|
||||
(pin (num 58) (name P58) (type passive))
|
||||
(pin (num 59) (name P59) (type passive))
|
||||
(pin (num 60) (name P60) (type passive))
|
||||
(pin (num 61) (name P61) (type passive))
|
||||
(pin (num 62) (name P62) (type passive))
|
||||
(pin (num 63) (name P63) (type passive))
|
||||
(pin (num 64) (name P64) (type passive))
|
||||
(pin (num 65) (name P65) (type passive))
|
||||
(pin (num 66) (name P66) (type passive))
|
||||
(pin (num 67) (name P67) (type passive))
|
||||
(pin (num 68) (name P68) (type passive))
|
||||
(pin (num 69) (name P69) (type passive))
|
||||
(pin (num 70) (name P70) (type passive))
|
||||
(pin (num 71) (name P71) (type passive))
|
||||
(pin (num 72) (name P72) (type passive))
|
||||
(pin (num 73) (name P73) (type passive))
|
||||
(pin (num 74) (name P74) (type passive))
|
||||
(pin (num 75) (name P75) (type passive))
|
||||
(pin (num 76) (name P76) (type passive))
|
||||
(pin (num 77) (name P77) (type passive))
|
||||
(pin (num 78) (name P78) (type passive))
|
||||
(pin (num 79) (name P79) (type passive))
|
||||
(pin (num 80) (name P80) (type passive)))))
|
||||
(libraries
|
||||
(library (logical device)
|
||||
(uri /usr/share/kicad/library/device.lib))
|
||||
(library (logical conn)
|
||||
(uri /usr/share/kicad/library/conn.lib)))
|
||||
(nets
|
||||
(net (code 1) (name "Net-(P2-Pad67)")
|
||||
(node (ref P2) (pin 67)))
|
||||
(net (code 2) (name "Net-(P2-Pad26)")
|
||||
(node (ref P2) (pin 26)))
|
||||
(net (code 3) (name "Net-(P2-Pad36)")
|
||||
(node (ref P2) (pin 36)))
|
||||
(net (code 4) (name "Net-(P2-Pad46)")
|
||||
(node (ref P2) (pin 46)))
|
||||
(net (code 5) (name "Net-(P2-Pad56)")
|
||||
(node (ref P2) (pin 56)))
|
||||
(net (code 6) (name "Net-(P2-Pad66)")
|
||||
(node (ref P2) (pin 66)))
|
||||
(net (code 7) (name "Net-(P2-Pad76)")
|
||||
(node (ref P2) (pin 76)))
|
||||
(net (code 8) (name "Net-(P2-Pad17)")
|
||||
(node (ref P2) (pin 17)))
|
||||
(net (code 9) (name "Net-(P2-Pad27)")
|
||||
(node (ref P2) (pin 27)))
|
||||
(net (code 10) (name "Net-(P2-Pad37)")
|
||||
(node (ref P2) (pin 37)))
|
||||
(net (code 11) (name "Net-(P2-Pad16)")
|
||||
(node (ref P2) (pin 16)))
|
||||
(net (code 12) (name "Net-(P2-Pad77)")
|
||||
(node (ref P2) (pin 77)))
|
||||
(net (code 13) (name "Net-(P2-Pad18)")
|
||||
(node (ref P2) (pin 18)))
|
||||
(net (code 14) (name "Net-(P2-Pad28)")
|
||||
(node (ref P2) (pin 28)))
|
||||
(net (code 15) (name "Net-(P2-Pad38)")
|
||||
(node (ref P2) (pin 38)))
|
||||
(net (code 16) (name +3V3)
|
||||
(node (ref R3) (pin 1))
|
||||
(node (ref P2) (pin 50))
|
||||
(node (ref R2) (pin 1))
|
||||
(node (ref P2) (pin 48))
|
||||
(node (ref R1) (pin 1)))
|
||||
(net (code 17) (name "Net-(P2-Pad58)")
|
||||
(node (ref P2) (pin 58)))
|
||||
(net (code 18) (name "Net-(P2-Pad68)")
|
||||
(node (ref P2) (pin 68)))
|
||||
(net (code 19) (name "Net-(P2-Pad78)")
|
||||
(node (ref P2) (pin 80))
|
||||
(node (ref P2) (pin 78)))
|
||||
(net (code 20) (name "Net-(P2-Pad19)")
|
||||
(node (ref P2) (pin 19)))
|
||||
(net (code 21) (name "Net-(P2-Pad29)")
|
||||
(node (ref P2) (pin 29)))
|
||||
(net (code 22) (name "Net-(P2-Pad44)")
|
||||
(node (ref P2) (pin 44)))
|
||||
(net (code 23) (name "Net-(P2-Pad13)")
|
||||
(node (ref P2) (pin 13)))
|
||||
(net (code 24) (name "Net-(P2-Pad23)")
|
||||
(node (ref P2) (pin 23)))
|
||||
(net (code 25) (name "Net-(P2-Pad33)")
|
||||
(node (ref P2) (pin 33)))
|
||||
(net (code 26) (name LED2)
|
||||
(node (ref P1) (pin 14))
|
||||
(node (ref P2) (pin 43)))
|
||||
(net (code 27) (name LED1)
|
||||
(node (ref P2) (pin 63))
|
||||
(node (ref P1) (pin 12)))
|
||||
(net (code 28) (name "Net-(P2-Pad73)")
|
||||
(node (ref P2) (pin 73)))
|
||||
(net (code 29) (name "Net-(P2-Pad14)")
|
||||
(node (ref P2) (pin 14)))
|
||||
(net (code 30) (name "Net-(P2-Pad24)")
|
||||
(node (ref P2) (pin 24)))
|
||||
(net (code 31) (name "Net-(P2-Pad34)")
|
||||
(node (ref P2) (pin 34)))
|
||||
(net (code 32) (name "Net-(P2-Pad39)")
|
||||
(node (ref P2) (pin 39)))
|
||||
(net (code 33) (name "Net-(P2-Pad64)")
|
||||
(node (ref P2) (pin 64)))
|
||||
(net (code 34) (name "Net-(P2-Pad74)")
|
||||
(node (ref P2) (pin 74)))
|
||||
(net (code 35) (name "Net-(P2-Pad15)")
|
||||
(node (ref P2) (pin 15)))
|
||||
(net (code 36) (name "Net-(P2-Pad25)")
|
||||
(node (ref P2) (pin 25)))
|
||||
(net (code 37) (name "Net-(P2-Pad35)")
|
||||
(node (ref P2) (pin 35)))
|
||||
(net (code 38) (name "Net-(P2-Pad45)")
|
||||
(node (ref P2) (pin 45)))
|
||||
(net (code 39) (name "Net-(P2-Pad65)")
|
||||
(node (ref P2) (pin 65)))
|
||||
(net (code 40) (name "Net-(P2-Pad75)")
|
||||
(node (ref P2) (pin 75)))
|
||||
(net (code 41) (name TX+)
|
||||
(node (ref P1) (pin 5))
|
||||
(node (ref P2) (pin 47)))
|
||||
(net (code 42) (name TX-)
|
||||
(node (ref P1) (pin 6))
|
||||
(node (ref P2) (pin 49)))
|
||||
(net (code 43) (name RX+)
|
||||
(node (ref P1) (pin 1))
|
||||
(node (ref P2) (pin 55)))
|
||||
(net (code 44) (name RX-)
|
||||
(node (ref P2) (pin 57))
|
||||
(node (ref P1) (pin 2)))
|
||||
(net (code 45) (name GND)
|
||||
(node (ref P2) (pin 51))
|
||||
(node (ref P2) (pin 52))
|
||||
(node (ref P1) (pin 8))
|
||||
(node (ref P1) (pin 9))
|
||||
(node (ref P1) (pin 10))
|
||||
(node (ref C2) (pin 1))
|
||||
(node (ref P2) (pin 53))
|
||||
(node (ref P2) (pin 54)))
|
||||
(net (code 46) (name "Net-(P2-Pad59)")
|
||||
(node (ref P2) (pin 59)))
|
||||
(net (code 47) (name "Net-(P2-Pad69)")
|
||||
(node (ref P2) (pin 69)))
|
||||
(net (code 48) (name "Net-(P2-Pad79)")
|
||||
(node (ref P2) (pin 79)))
|
||||
(net (code 49) (name "Net-(P2-Pad72)")
|
||||
(node (ref P2) (pin 72)))
|
||||
(net (code 50) (name "Net-(P1-Pad13)")
|
||||
(node (ref R2) (pin 2))
|
||||
(node (ref P1) (pin 13)))
|
||||
(net (code 51) (name "Net-(P1-Pad11)")
|
||||
(node (ref P1) (pin 11))
|
||||
(node (ref R1) (pin 2)))
|
||||
(net (code 52) (name "Net-(P1-Pad7)")
|
||||
(node (ref P1) (pin 7)))
|
||||
(net (code 53) (name "Net-(C2-Pad2)")
|
||||
(node (ref P1) (pin 4))
|
||||
(node (ref P1) (pin 3))
|
||||
(node (ref C2) (pin 2))
|
||||
(node (ref R3) (pin 2)))
|
||||
(net (code 54) (name "Net-(P2-Pad31)")
|
||||
(node (ref P2) (pin 31)))
|
||||
(net (code 55) (name "Net-(P2-Pad9)")
|
||||
(node (ref P2) (pin 9)))
|
||||
(net (code 56) (name "Net-(P2-Pad10)")
|
||||
(node (ref P2) (pin 10)))
|
||||
(net (code 57) (name "Net-(P2-Pad20)")
|
||||
(node (ref P2) (pin 20)))
|
||||
(net (code 58) (name "Net-(P2-Pad30)")
|
||||
(node (ref P2) (pin 30)))
|
||||
(net (code 59) (name "Net-(P2-Pad40)")
|
||||
(node (ref P2) (pin 40)))
|
||||
(net (code 60) (name "Net-(P2-Pad60)")
|
||||
(node (ref P2) (pin 60)))
|
||||
(net (code 61) (name "Net-(P2-Pad70)")
|
||||
(node (ref P2) (pin 70)))
|
||||
(net (code 62) (name "Net-(P2-Pad11)")
|
||||
(node (ref P2) (pin 11)))
|
||||
(net (code 63) (name "Net-(P2-Pad21)")
|
||||
(node (ref P2) (pin 21)))
|
||||
(net (code 64) (name "Net-(P2-Pad8)")
|
||||
(node (ref P2) (pin 8)))
|
||||
(net (code 65) (name "Net-(P2-Pad41)")
|
||||
(node (ref P2) (pin 41)))
|
||||
(net (code 66) (name "Net-(P2-Pad61)")
|
||||
(node (ref P2) (pin 61)))
|
||||
(net (code 67) (name "Net-(P2-Pad71)")
|
||||
(node (ref P2) (pin 71)))
|
||||
(net (code 68) (name "Net-(P2-Pad12)")
|
||||
(node (ref P2) (pin 12)))
|
||||
(net (code 69) (name "Net-(P2-Pad22)")
|
||||
(node (ref P2) (pin 22)))
|
||||
(net (code 70) (name "Net-(P2-Pad32)")
|
||||
(node (ref P2) (pin 32)))
|
||||
(net (code 71) (name "Net-(P2-Pad42)")
|
||||
(node (ref P2) (pin 42)))
|
||||
(net (code 72) (name "Net-(P2-Pad62)")
|
||||
(node (ref P2) (pin 62)))
|
||||
(net (code 73) (name "Net-(P2-Pad1)")
|
||||
(node (ref P2) (pin 1)))
|
||||
(net (code 74) (name "Net-(P2-Pad2)")
|
||||
(node (ref P2) (pin 2)))
|
||||
(net (code 75) (name "Net-(P2-Pad3)")
|
||||
(node (ref P2) (pin 3)))
|
||||
(net (code 76) (name "Net-(P2-Pad4)")
|
||||
(node (ref P2) (pin 4)))
|
||||
(net (code 77) (name "Net-(P2-Pad5)")
|
||||
(node (ref P2) (pin 5)))
|
||||
(net (code 78) (name "Net-(P2-Pad6)")
|
||||
(node (ref P2) (pin 6)))
|
||||
(net (code 79) (name "Net-(P2-Pad7)")
|
||||
(node (ref P2) (pin 7)))))
|
45
dsoxlan.pro
45
dsoxlan.pro
|
@ -1,45 +0,0 @@
|
|||
update=Sun 04 Nov 2018 10:00:37 EET
|
||||
version=1
|
||||
last_client=kicad
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[cvpcb/libraries]
|
||||
EquName1=devcms
|
||||
[pcbnew]
|
||||
version=1
|
||||
LastNetListRead=
|
||||
UseCmpFile=1
|
||||
PadDrill=0.600000000000
|
||||
PadDrillOvalY=0.600000000000
|
||||
PadSizeH=1.500000000000
|
||||
PadSizeV=1.500000000000
|
||||
PcbTextSizeV=1.500000000000
|
||||
PcbTextSizeH=1.500000000000
|
||||
PcbTextThickness=0.300000000000
|
||||
ModuleTextSizeV=1.000000000000
|
||||
ModuleTextSizeH=1.000000000000
|
||||
ModuleTextSizeThickness=0.150000000000
|
||||
SolderMaskClearance=0.000000000000
|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[general]
|
||||
version=1
|
||||
[schematic_editor]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
PlotDirectoryName=
|
||||
SubpartIdSeparator=0
|
||||
SubpartFirstId=65
|
||||
NetFmtName=
|
||||
SpiceForceRefPrefix=0
|
||||
SpiceUseNetNumbers=0
|
||||
RptD_X=0
|
||||
RptD_Y=100
|
||||
RptLab=1
|
||||
LabSize=60
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
356
dsoxlan.sch
356
dsoxlan.sch
|
@ -1,356 +0,0 @@
|
|||
EESchema Schematic File Version 2
|
||||
LIBS:power
|
||||
LIBS:device
|
||||
LIBS:transistors
|
||||
LIBS:conn
|
||||
LIBS:linear
|
||||
LIBS:regul
|
||||
LIBS:74xx
|
||||
LIBS:cmos4000
|
||||
LIBS:adc-dac
|
||||
LIBS:memory
|
||||
LIBS:xilinx
|
||||
LIBS:special
|
||||
LIBS:microcontrollers
|
||||
LIBS:dsp
|
||||
LIBS:microchip
|
||||
LIBS:analog_switches
|
||||
LIBS:motorola
|
||||
LIBS:texas
|
||||
LIBS:intel
|
||||
LIBS:audio
|
||||
LIBS:interface
|
||||
LIBS:digital-audio
|
||||
LIBS:philips
|
||||
LIBS:display
|
||||
LIBS:cypress
|
||||
LIBS:siliconi
|
||||
LIBS:opto
|
||||
LIBS:atmel
|
||||
LIBS:contrib
|
||||
LIBS:valves
|
||||
EELAYER 25 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 1
|
||||
Title ""
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp ""
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Comp
|
||||
L CNT-RJ45 P1
|
||||
U 1 1 548C86EB
|
||||
P 3550 3350
|
||||
F 0 "P1" V 3520 3350 60 0000 C CNN
|
||||
F 1 "CNT-RJ45" V 3630 3350 60 0000 C CNN
|
||||
F 2 "awallin:ETH-MAGJACK" H 3550 3350 60 0001 C CNN
|
||||
F 3 "" H 3550 3350 60 0000 C CNN
|
||||
1 3550 3350
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L GND #PWR01
|
||||
U 1 1 548C87CB
|
||||
P 3550 4400
|
||||
F 0 "#PWR01" H 3550 4150 60 0001 C CNN
|
||||
F 1 "GND" H 3550 4250 60 0000 C CNN
|
||||
F 2 "" H 3550 4400 60 0000 C CNN
|
||||
F 3 "" H 3550 4400 60 0000 C CNN
|
||||
1 3550 4400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L R R2
|
||||
U 1 1 548C8821
|
||||
P 4300 3850
|
||||
F 0 "R2" V 4380 3850 40 0000 C CNN
|
||||
F 1 "220R" V 4307 3851 40 0000 C CNN
|
||||
F 2 "Resistors_SMD:R_0805_HandSoldering" V 4230 3850 30 0001 C CNN
|
||||
F 3 "" H 4300 3850 30 0000 C CNN
|
||||
1 4300 3850
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L R R1
|
||||
U 1 1 548C8849
|
||||
P 4300 3550
|
||||
F 0 "R1" V 4380 3550 40 0000 C CNN
|
||||
F 1 "220R" V 4307 3551 40 0000 C CNN
|
||||
F 2 "Resistors_SMD:R_0805_HandSoldering" V 4230 3550 30 0001 C CNN
|
||||
F 3 "" H 4300 3550 30 0000 C CNN
|
||||
1 4300 3550
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L +3V3 #PWR02
|
||||
U 1 1 548C8877
|
||||
P 4650 3550
|
||||
F 0 "#PWR02" H 4650 3400 60 0001 C CNN
|
||||
F 1 "+3V3" H 4650 3690 60 0000 C CNN
|
||||
F 2 "" H 4650 3550 60 0000 C CNN
|
||||
F 3 "" H 4650 3550 60 0000 C CNN
|
||||
1 4650 3550
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L +3V3 #PWR03
|
||||
U 1 1 548C888D
|
||||
P 4650 3850
|
||||
F 0 "#PWR03" H 4650 3700 60 0001 C CNN
|
||||
F 1 "+3V3" H 4650 3990 60 0000 C CNN
|
||||
F 2 "" H 4650 3850 60 0000 C CNN
|
||||
F 3 "" H 4650 3850 60 0000 C CNN
|
||||
1 4650 3850
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
4650 3850 4550 3850
|
||||
Wire Wire Line
|
||||
4550 3550 4650 3550
|
||||
Wire Wire Line
|
||||
4050 3850 3900 3850
|
||||
Wire Wire Line
|
||||
3900 3550 4050 3550
|
||||
$Comp
|
||||
L GND #PWR04
|
||||
U 1 1 548C88F2
|
||||
P 4000 3400
|
||||
F 0 "#PWR04" H 4000 3150 60 0001 C CNN
|
||||
F 1 "GND" H 4150 3350 60 0000 C CNN
|
||||
F 2 "" H 4000 3400 60 0000 C CNN
|
||||
F 3 "" H 4000 3400 60 0000 C CNN
|
||||
1 4000 3400
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
4000 3400 3900 3400
|
||||
NoConn ~ 3900 3300
|
||||
Wire Wire Line
|
||||
3900 2900 4400 2900
|
||||
Wire Wire Line
|
||||
4000 2900 4000 3000
|
||||
Wire Wire Line
|
||||
4000 3000 3900 3000
|
||||
$Comp
|
||||
L C C2
|
||||
U 1 1 548C8996
|
||||
P 4300 2650
|
||||
F 0 "C2" H 4300 2750 40 0000 L CNN
|
||||
F 1 "1n" H 4306 2565 40 0000 L CNN
|
||||
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 4338 2500 30 0001 C CNN
|
||||
F 3 "" H 4300 2650 60 0000 C CNN
|
||||
1 4300 2650
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Connection ~ 4000 2900
|
||||
$Comp
|
||||
L GND #PWR05
|
||||
U 1 1 548C8A30
|
||||
P 4450 2450
|
||||
F 0 "#PWR05" H 4450 2200 60 0001 C CNN
|
||||
F 1 "GND" H 4600 2400 60 0000 C CNN
|
||||
F 2 "" H 4450 2450 60 0000 C CNN
|
||||
F 3 "" H 4450 2450 60 0000 C CNN
|
||||
1 4450 2450
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L R R3
|
||||
U 1 1 548C8A5B
|
||||
P 4650 2900
|
||||
F 0 "R3" V 4730 2900 40 0000 C CNN
|
||||
F 1 "10R" V 4657 2901 40 0000 C CNN
|
||||
F 2 "Resistors_SMD:R_0805_HandSoldering" V 4580 2900 30 0001 C CNN
|
||||
F 3 "" H 4650 2900 30 0000 C CNN
|
||||
1 4650 2900
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
Connection ~ 4300 2900
|
||||
$Comp
|
||||
L +3V3 #PWR06
|
||||
U 1 1 548C8AB6
|
||||
P 5000 2900
|
||||
F 0 "#PWR06" H 5000 2750 60 0001 C CNN
|
||||
F 1 "+3V3" H 5000 3040 60 0000 C CNN
|
||||
F 2 "" H 5000 2900 60 0000 C CNN
|
||||
F 3 "" H 5000 2900 60 0000 C CNN
|
||||
1 5000 2900
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
5000 2900 4900 2900
|
||||
Text Notes 3300 2200 0 60 ~ 0
|
||||
Digi-Key 1419-1021-ND
|
||||
Text GLabel 3950 3700 2 60 Input ~ 0
|
||||
LED1
|
||||
Text GLabel 3950 4000 2 60 Input ~ 0
|
||||
LED2
|
||||
Text GLabel 3950 3100 2 60 Input ~ 0
|
||||
TX+
|
||||
Text GLabel 3950 3200 2 60 Input ~ 0
|
||||
TX-
|
||||
Wire Wire Line
|
||||
4300 2850 4300 2900
|
||||
Wire Wire Line
|
||||
4300 2450 4450 2450
|
||||
Text GLabel 3950 2700 2 60 Input ~ 0
|
||||
RX+
|
||||
Text GLabel 3950 2800 2 60 Input ~ 0
|
||||
RX-
|
||||
Wire Wire Line
|
||||
3950 2700 3900 2700
|
||||
Wire Wire Line
|
||||
3950 2800 3900 2800
|
||||
Wire Wire Line
|
||||
3950 3100 3900 3100
|
||||
Wire Wire Line
|
||||
3950 3200 3900 3200
|
||||
Wire Wire Line
|
||||
3950 4000 3900 4000
|
||||
Wire Wire Line
|
||||
3950 3700 3900 3700
|
||||
$Comp
|
||||
L CONN_02X40 P2
|
||||
U 1 1 548C918C
|
||||
P 7450 3350
|
||||
F 0 "P2" H 7450 5400 50 0000 C CNN
|
||||
F 1 "CONN_02X40" V 7450 3350 50 0000 C CNN
|
||||
F 2 "awallin:cardedge_40x2" H 7450 3350 60 0001 C CNN
|
||||
F 3 "" H 7450 3350 60 0000 C CNN
|
||||
1 7450 3350
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text Notes 6700 1350 0 60 ~ 0
|
||||
top-side
|
||||
Text Notes 7800 1350 0 60 ~ 0
|
||||
bottom-side
|
||||
Text Notes 7000 1200 0 60 ~ 0
|
||||
right edge of card
|
||||
Text Notes 7050 5500 0 60 ~ 0
|
||||
left edge of card
|
||||
Wire Notes Line
|
||||
7100 3550 7850 3550
|
||||
Text Notes 7900 3550 0 60 ~ 0
|
||||
notch in card-edge connector
|
||||
$Comp
|
||||
L GND #PWR07
|
||||
U 1 1 548C93E3
|
||||
P 6700 4000
|
||||
F 0 "#PWR07" H 6700 3750 60 0001 C CNN
|
||||
F 1 "GND" H 6700 3850 60 0000 C CNN
|
||||
F 2 "" H 6700 4000 60 0000 C CNN
|
||||
F 3 "" H 6700 4000 60 0000 C CNN
|
||||
1 6700 4000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
6700 3900 7200 3900
|
||||
Wire Wire Line
|
||||
7200 4000 7000 4000
|
||||
Wire Wire Line
|
||||
7000 4000 7000 3900
|
||||
Connection ~ 7000 3900
|
||||
$Comp
|
||||
L GND #PWR08
|
||||
U 1 1 548C9445
|
||||
P 8050 4050
|
||||
F 0 "#PWR08" H 8050 3800 60 0001 C CNN
|
||||
F 1 "GND" H 8050 3900 60 0000 C CNN
|
||||
F 2 "" H 8050 4050 60 0000 C CNN
|
||||
F 3 "" H 8050 4050 60 0000 C CNN
|
||||
1 8050 4050
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
7700 4000 8050 4000
|
||||
Wire Wire Line
|
||||
8050 3900 8050 4050
|
||||
Wire Wire Line
|
||||
7700 3900 8050 3900
|
||||
Connection ~ 8050 4000
|
||||
Wire Wire Line
|
||||
7700 5200 7850 5200
|
||||
Wire Wire Line
|
||||
7850 5200 7850 5300
|
||||
Wire Wire Line
|
||||
7850 5300 7700 5300
|
||||
Text Notes 7900 5300 0 60 ~ 0
|
||||
LAN_EN
|
||||
Text GLabel 7100 4500 0 60 Input ~ 0
|
||||
LED1
|
||||
Text GLabel 7100 3500 0 60 Input ~ 0
|
||||
LED2
|
||||
Wire Wire Line
|
||||
7200 3500 7100 3500
|
||||
Wire Wire Line
|
||||
7200 4500 7100 4500
|
||||
$Comp
|
||||
L +3V3 #PWR09
|
||||
U 1 1 548C96F2
|
||||
P 7950 3800
|
||||
F 0 "#PWR09" H 7950 3650 60 0001 C CNN
|
||||
F 1 "+3V3" H 7950 3940 60 0000 C CNN
|
||||
F 2 "" H 7950 3800 60 0000 C CNN
|
||||
F 3 "" H 7950 3800 60 0000 C CNN
|
||||
1 7950 3800
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
7950 3800 7700 3800
|
||||
Wire Wire Line
|
||||
7700 3700 7800 3700
|
||||
Wire Wire Line
|
||||
7800 3700 7800 3800
|
||||
Connection ~ 7800 3800
|
||||
Text GLabel 7100 3700 0 60 Input ~ 0
|
||||
TX+
|
||||
Text GLabel 7100 3800 0 60 Input ~ 0
|
||||
TX-
|
||||
Wire Wire Line
|
||||
7200 3800 7100 3800
|
||||
Wire Wire Line
|
||||
7200 3700 7100 3700
|
||||
Wire Wire Line
|
||||
6700 3900 6700 4000
|
||||
Text GLabel 7100 4100 0 60 Input ~ 0
|
||||
RX+
|
||||
Text GLabel 7100 4200 0 60 Input ~ 0
|
||||
RX-
|
||||
Wire Wire Line
|
||||
7100 4200 7200 4200
|
||||
Wire Wire Line
|
||||
7100 4100 7200 4100
|
||||
Text Notes 7950 5450 0 60 ~ 0
|
||||
bottom-side
|
||||
Text Notes 6600 5400 0 60 ~ 0
|
||||
top-side
|
||||
Wire Wire Line
|
||||
3550 4400 3550 4300
|
||||
$Comp
|
||||
L GND #PWR010
|
||||
U 1 1 548CB9C9
|
||||
P 3400 2450
|
||||
F 0 "#PWR010" H 3400 2200 60 0001 C CNN
|
||||
F 1 "GND" H 3400 2300 60 0000 C CNN
|
||||
F 2 "" H 3400 2450 60 0000 C CNN
|
||||
F 3 "" H 3400 2450 60 0000 C CNN
|
||||
1 3400 2450
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3400 2450 3400 2300
|
||||
Wire Wire Line
|
||||
3400 2300 3550 2300
|
||||
Wire Wire Line
|
||||
3550 2300 3550 2400
|
||||
Text Notes 7600 6850 0 60 ~ 0
|
||||
DIY DSOXLAN for Agilent DSO-X 2000 and 3000
|
||||
Text Notes 8250 7050 0 60 ~ 0
|
||||
AW 2014-12-18
|
||||
$EndSCHEMATC
|
Loading…
Reference in New Issue
Block a user