Bug fixes for timers, added some wdt support for limit debounce.

- Typo in timer def,
- Handle 8 bit timers correctly,
- Don't skip TOP count in CTC mode
- added SREG for atomic bit operations
This commit is contained in:
ashelly
2014-07-10 13:01:03 -04:00
parent 23ed7b6d4b
commit 9b37637ae6
7 changed files with 198 additions and 138 deletions

View File

@@ -179,7 +179,7 @@
// NOTE: Uncomment to enable. The recommended delay must be > 3us, and, when added with the
// user-supplied step pulse time, the total time must not exceed 127us. Reported successful
// values for certain setups have ranged from 5 to 20us.
// #define STEP_PULSE_DELAY 10 // Step pulse delay in microseconds. Default disabled.
#define STEP_PULSE_DELAY 10 // Step pulse delay in microseconds. Default disabled.
// The number of linear motions in the planner buffer to be planned at any give time. The vast
// majority of RAM that Grbl uses is based on this buffer size. Only increase if there is extra
@@ -232,7 +232,7 @@
// electrical interference on the signal cables from external sources. It's recommended to first
// use shielded signal cables with their shielding connected to ground (old USB/computer cables
// work well and are cheap to find) and wire in a low-pass circuit into each limit pin.
// #define ENABLE_SOFTWARE_DEBOUNCE // Default disabled. Uncomment to enable.
#define ENABLE_SOFTWARE_DEBOUNCE // Default disabled. Uncomment to enable.
// ---------------------------------------------------------------------------------------