195 lines
8.9 KiB
C
195 lines
8.9 KiB
C
/*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _HARDWARE_CLOCKS_H_
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#define _HARDWARE_CLOCKS_H_
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#include "pico.h"
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#include "hardware/structs/clocks.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** \file hardware/clocks.h
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* \defgroup hardware_clocks hardware_clocks
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*
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* Clock Management API
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*
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* This API provides a high level interface to the clock functions.
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*
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* The clocks block provides independent clocks to on-chip and external components. It takes inputs from a variety of clock
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* sources allowing the user to trade off performance against cost, board area and power consumption. From these sources
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* it uses multiple clock generators to provide the required clocks. This architecture allows the user flexibility to start and
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* stop clocks independently and to vary some clock frequencies whilst maintaining others at their optimum frequencies
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*
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* Please refer to the datasheet for more details on the RP2040 clocks.
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*
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* The clock source depends on which clock you are attempting to configure. The first table below shows main clock sources. If
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* you are not setting the Reference clock or the System clock, or you are specifying that one of those two will be using an auxiliary
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* clock source, then you will need to use one of the entries from the subsequent tables.
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*
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* **Main Clock Sources**
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*
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* Source | Reference Clock | System Clock
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* -------|-----------------|---------
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* ROSC | CLOCKS_CLK_REF_CTRL_SRC_VALUE_ROSC_CLKSRC_PH | |
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* Auxiliary | CLOCKS_CLK_REF_CTRL_SRC_VALUE_CLKSRC_CLK_REF_AUX | CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX
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* XOSC | CLOCKS_CLK_REF_CTRL_SRC_VALUE_XOSC_CLKSRC | |
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* Reference | | CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLK_REF
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*
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* **Auxiliary Clock Sources**
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*
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* The auxiliary clock sources available for use in the configure function depend on which clock is being configured. The following table
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* describes the available values that can be used. Note that for clk_gpout[x], x can be 0-3.
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*
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*
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* Aux Source | clk_gpout[x] | clk_ref | clk_sys
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* -----------|------------|---------|--------
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* System PLL | CLOCKS_CLK_GPOUTx_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS | | CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS
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* GPIO in 0 | CLOCKS_CLK_GPOUTx_CTRL_AUXSRC_VALUE_CLKSRC_GPIN0 | CLOCKS_CLK_REF_CTRL_AUXSRC_VALUE_CLKSRC_GPIN0 | CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_GPIN0
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* GPIO in 1 | CLOCKS_CLK_GPOUTx_CTRL_AUXSRC_VALUE_CLKSRC_GPIN1 | CLOCKS_CLK_REF_CTRL_AUXSRC_VALUE_CLKSRC_GPIN1 | CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_GPIN1
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* USB PLL | CLOCKS_CLK_GPOUTx_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB | CLOCKS_CLK_REF_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB| CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB
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* ROSC | CLOCKS_CLK_GPOUTx_CTRL_AUXSRC_VALUE_ROSC_CLKSRC | | CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_ROSC_CLKSRC
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* XOSC | CLOCKS_CLK_GPOUTx_CTRL_AUXSRC_VALUE_XOSC_CLKSRC | | CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_ROSC_CLKSRC
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* System clock | CLOCKS_CLK_GPOUTx_CTRL_AUXSRC_VALUE_CLK_SYS | | |
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* USB Clock | CLOCKS_CLK_GPOUTx_CTRL_AUXSRC_VALUE_CLK_USB | | |
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* ADC clock | CLOCKS_CLK_GPOUTx_CTRL_AUXSRC_VALUE_CLK_ADC | | |
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* RTC Clock | CLOCKS_CLK_GPOUTx_CTRL_AUXSRC_VALUE_CLK_RTC | | |
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* Ref clock | CLOCKS_CLK_GPOUTx_CTRL_AUXSRC_VALUE_CLK_REF | | |
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*
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* Aux Source | clk_peri | clk_usb | clk_adc
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* -----------|-----------|---------|--------
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* System PLL | CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS | CLOCKS_CLK_USB_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS | CLOCKS_CLK_ADC_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS
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* GPIO in 0 | CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_GPIN0 | CLOCKS_CLK_USB_CTRL_AUXSRC_VALUE_CLKSRC_GPIN0 | CLOCKS_CLK_ADC_CTRL_AUXSRC_VALUE_CLKSRC_GPIN0
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* GPIO in 1 | CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_GPIN1 | CLOCKS_CLK_USB_CTRL_AUXSRC_VALUE_CLKSRC_GPIN1 | CLOCKS_CLK_ADC_CTRL_AUXSRC_VALUE_CLKSRC_GPIN1
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* USB PLL | CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB | CLOCKS_CLK_USB_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB | CLOCKS_CLK_ADC_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB
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* ROSC | CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_ROSC_CLKSRC_PH | CLOCKS_CLK_USB_CTRL_AUXSRC_VALUE_ROSC_CLKSRC_PH | CLOCKS_CLK_ADC_CTRL_AUXSRC_VALUE_ROSC_CLKSRC_PH
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* XOSC | CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_XOSC_CLKSRC | CLOCKS_CLK_USB_CTRL_AUXSRC_VALUE_XOSC_CLKSRC | CLOCKS_CLK_ADC_CTRL_AUXSRC_VALUE_XOSC_CLKSRC
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* System clock | CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLK_SYS | | |
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*
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* Aux Source | clk_rtc
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* -----------|----------
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* System PLL | CLOCKS_CLK_RTC_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS
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* GPIO in 0 | CLOCKS_CLK_RTC_CTRL_AUXSRC_VALUE_CLKSRC_GPIN0
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* GPIO in 1 | CLOCKS_CLK_RTC_CTRL_AUXSRC_VALUE_CLKSRC_GPIN1
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* USB PLL | CLOCKS_CLK_RTC_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB
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* ROSC | CLOCKS_CLK_RTC_CTRL_AUXSRC_VALUE_ROSC_CLKSRC_PH
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* XOSC | CLOCKS_CLK_RTC_CTRL_AUXSRC_VALUE_XOSC_CLKSRC
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*
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* \section clock_example Example
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* \addtogroup hardware_clocks
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* \include hello_48MHz.c
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*/
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#define KHZ 1000
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#define MHZ 1000000
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// PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_CLOCKS, Enable/disable assertions in the clocks module, type=bool, default=0, group=hardware_clocks
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#ifndef PARAM_ASSERTIONS_ENABLED_CLOCKS
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#define PARAM_ASSERTIONS_ENABLED_CLOCKS 0
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#endif
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/*! \brief Initialise the clock hardware
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* \ingroup hardware_clocks
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*
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* Must be called before any other clock function.
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*/
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void clocks_init();
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/*! \brief Configure the specified clock
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* \ingroup hardware_clocks
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*
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* See the tables in the description for details on the possible values for clock sources.
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*
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* \param clk_index The clock to configure
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* \param src The main clock source, can be 0.
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* \param auxsrc The auxiliary clock source, which depends on which clock is being set. Can be 0
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* \param src_freq Frequency of the input clock source
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* \param freq Requested frequency
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*/
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bool clock_configure(enum clock_index clk_index, uint32_t src, uint32_t auxsrc, uint32_t src_freq, uint32_t freq);
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/*! \brief Stop the specified clock
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* \ingroup hardware_clocks
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*
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* \param clk_index The clock to stop
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*/
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void clock_stop(enum clock_index clk_index);
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/*! \brief Get the current frequency of the specified clock
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* \ingroup hardware_clocks
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*
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* \param clk_index Clock
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* \return Clock frequency in Hz
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*/
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uint32_t clock_get_hz(enum clock_index clk_index);
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/*! \brief Measure a clocks frequency using the Frequency counter.
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* \ingroup hardware_clocks
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*
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* Uses the inbuilt frequency counter to measure the specified clocks frequency.
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* Currently, this function is accurate to +-1KHz. See the datasheet for more details.
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*/
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uint32_t frequency_count_khz(uint src);
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/*! \brief Set the "current frequency" of the clock as reported by clock_get_hz without actually changing the clock
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* \ingroup hardware_clocks
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*
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* \see clock_get_hz
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*/
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void clock_set_reported_hz(enum clock_index clk_index, uint hz);
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/// \tag::frequency_count_mhz[]
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static inline float frequency_count_mhz(uint src) {
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return ((float) (frequency_count_khz(src))) / KHZ;
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}
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/// \end::frequency_count_mhz[]
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/*! \brief Resus callback function type.
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* \ingroup hardware_clocks
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*
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* User provided callback for a resus event (when clk_sys is stopped by the programmer and is restarted for them).
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*/
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typedef void (*resus_callback_t)(void);
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/*! \brief Enable the resus function. Restarts clk_sys if it is accidentally stopped.
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* \ingroup hardware_clocks
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*
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* The resuscitate function will restart the system clock if it falls below a certain speed (or stops). This
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* could happen if the clock source the system clock is running from stops. For example if a PLL is stopped.
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*
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* \param resus_callback a function pointer provided by the user to call if a resus event happens.
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*/
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void clocks_enable_resus(resus_callback_t resus_callback);
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/*! \brief Output an optionally divided clock to the specified gpio pin.
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* \ingroup hardware_clocks
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*
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* \param gpio The GPIO pin to output the clock to. Valid GPIOs are: 21, 23, 24, 26. These GPIOs are connected to the GPOUT0-3 clock generators.
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* \param src The source clock. See the register field CLOCKS_CLK_GPOUT0_CTRL_AUXSRC for a full list. The list is the same for each GPOUT clock generator.
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* \param div The amount to divide the source clock by. This is useful to not overwhelm the GPIO pin with a fast clock.
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*/
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void clock_gpio_init(uint gpio, uint src, uint div);
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/*! \brief Configure a clock to come from a gpio input
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* \ingroup hardware_clocks
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*
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* \param clk_index The clock to configure
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* \param gpio The GPIO pin to run the clock from. Valid GPIOs are: 20 and 22.
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* \param src_freq Frequency of the input clock source
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* \param freq Requested frequency
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*/
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bool clock_configure_gpin(enum clock_index clk_index, uint gpio, uint32_t src_freq, uint32_t freq);
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#ifdef __cplusplus
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}
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#endif
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#endif
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