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NDS32: Generic Board Support and Unsupport

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Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>
This commit is contained in:
Kun-Hua Huang
2015-08-24 14:52:35 +08:00
committed by Tom Rini
parent 14006a5671
commit 2e88bb28d8
14 changed files with 104 additions and 427 deletions
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50
include/configs/adp-ag101p.h
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@@ -20,22 +20,29 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_GENERIC_GLOBAL_DATA
/*
* Definitions related to passing arguments to kernel.
*/
#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
#define CONFIG_INITRD_TAG /* send initrd params */
#define CONFIG_NEEDS_MANUAL_RELOC
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_MEM_REMAP
#endif
#ifdef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_TEXT_BASE 0x03200000
#define CONFIG_SYS_TEXT_BASE 0x00500000
#else
#ifdef CONFIG_MEM_REMAP
#define CONFIG_SYS_TEXT_BASE 0x80000000
#else
#define CONFIG_SYS_TEXT_BASE 0x00000000
#endif
#endif
/*
* Timer
@@ -225,20 +232,33 @@
/*
* Physical Memory Map
*/
#if defined(CONFIG_MEM_REMAP) || defined(CONFIG_SKIP_LOWLEVEL_INIT)
#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */
#if defined(CONFIG_MEM_REMAP)
#define PHYS_SDRAM_0_AT_INIT 0x10000000 /* SDRAM Bank #1 before remap*/
#ifdef CONFIG_SKIP_LOWLEVEL_INIT
#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */
#else
#ifdef CONFIG_MEM_REMAP
#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */
#else
#define PHYS_SDRAM_0 0x80000000 /* SDRAM Bank #1 */
#endif
#else /* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */
#define PHYS_SDRAM_0 0x10000000 /* SDRAM Bank #1 */
#endif
#define PHYS_SDRAM_1 \
(PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */
#define PHYS_SDRAM_0_SIZE 0x04000000 /* 64 MB */
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
#ifdef CONFIG_SKIP_LOWLEVEL_INIT
#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */
#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
#else
#ifdef CONFIG_MEM_REMAP
#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */
#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
#else
#define PHYS_SDRAM_0_SIZE 0x08000000 /* 128 MB */
#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
#endif
#endif
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0
@@ -318,19 +338,20 @@
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_SYS_CFI_FLASH_STATUS_POLL
/* support JEDEC */
/* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */
#ifdef CONFIG_SKIP_LOWLEVEL_INIT
#define PHYS_FLASH_1 0x80400000 /* BANK 1 */
#else /* !CONFIG_SKIP_LOWLEVEL_INIT */
#define PHYS_FLASH_1 0x80000000 /* BANK 0 */
#else
#ifdef CONFIG_MEM_REMAP
#define PHYS_FLASH_1 0x80000000 /* BANK 0 */
#else
#define PHYS_FLASH_1 0x00000000 /* BANK 0 */
#endif
#endif /* CONFIG_MEM_REMAP */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, }
@@ -345,11 +366,12 @@
* but we have only 1 bank connected to flash on board
*/
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000}
/* max number of sectors on one chip */
#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2*2)
#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2)
#define CONFIG_ENV_SECT_SIZE CONFIG_FLASH_SECTOR_SIZE
#define CONFIG_SYS_MAX_FLASH_SECT 128
#define CONFIG_SYS_MAX_FLASH_SECT 512
/* environments */
#define CONFIG_ENV_IS_IN_FLASH