driver/ddr: Add 256 byte interleaving support
Freescale LayerScape SoCs support controller interleaving on 256 byte size. This interleaving is mandoratory. Signed-off-by: York Sun <yorksun@freescale.com>
This commit is contained in:
@@ -145,6 +145,7 @@ static void set_csn_config(int dimm_number, int i, fsl_ddr_cfg_regs_t *ddr,
|
||||
if (!popts->memctl_interleaving)
|
||||
break;
|
||||
switch (popts->memctl_interleaving_mode) {
|
||||
case FSL_DDR_256B_INTERLEAVING:
|
||||
case FSL_DDR_CACHE_LINE_INTERLEAVING:
|
||||
case FSL_DDR_PAGE_INTERLEAVING:
|
||||
case FSL_DDR_BANK_INTERLEAVING:
|
||||
|
||||
Reference in New Issue
Block a user