NET: Add Ethernet 1000BASE-X support for PPC4xx
This patch adds support for 1000BASE-X to functions "miiphy_speed ()" and "miiphy_duplex()". It also adds function "miiphy_is_1000base_x ()", which returns non-zero iff the PHY registers are configured for 1000BASE-X. The "mii info" command is modified to distinguish between 1000BASE-T and -X. Signed-off-by: Larry Johnson <lrj@acm.org> Signed-off-by: Ben Warren <bwarren@qstreams.com>
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Ben Warren
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298035df49
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71bc6e6474
@@ -41,6 +41,7 @@ int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
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int miiphy_reset (char *devname, unsigned char addr);
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int miiphy_speed (char *devname, unsigned char addr);
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int miiphy_duplex (char *devname, unsigned char addr);
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int miiphy_is_1000base_x (char *devname, unsigned char addr);
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#ifdef CFG_FAULT_ECHO_LINK_DOWN
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int miiphy_link (char *devname, unsigned char addr);
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#endif
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@@ -85,6 +86,7 @@ int bb_miiphy_write (char *devname, unsigned char addr,
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#define PHY_ANLPNP 0x08
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#define PHY_1000BTCR 0x09
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#define PHY_1000BTSR 0x0A
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#define PHY_EXSR 0x0F
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#define PHY_PHYSTS 0x10
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#define PHY_MIPSCR 0x11
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#define PHY_MIPGSR 0x12
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@@ -118,6 +120,7 @@ int bb_miiphy_write (char *devname, unsigned char addr,
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#define PHY_BMSR_100TXH 0x2000
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#define PHY_BMSR_10TF 0x1000
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#define PHY_BMSR_10TH 0x0800
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#define PHY_BMSR_EXT_STAT 0x0100
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#define PHY_BMSR_PRE_SUP 0x0040
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#define PHY_BMSR_AUTN_COMP 0x0020
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#define PHY_BMSR_RF 0x0010
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@@ -130,17 +133,30 @@ int bb_miiphy_write (char *devname, unsigned char addr,
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#define PHY_ANLPAR_NP 0x8000
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#define PHY_ANLPAR_ACK 0x4000
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#define PHY_ANLPAR_RF 0x2000
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#define PHY_ANLPAR_ASYMP 0x0800
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#define PHY_ANLPAR_PAUSE 0x0400
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#define PHY_ANLPAR_T4 0x0200
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#define PHY_ANLPAR_TXFD 0x0100
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#define PHY_ANLPAR_TX 0x0080
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#define PHY_ANLPAR_10FD 0x0040
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#define PHY_ANLPAR_10 0x0020
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#define PHY_ANLPAR_100 0x0380 /* we can run at 100 */
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/* phy ANLPAR 1000BASE-X */
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#define PHY_X_ANLPAR_NP 0x8000
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#define PHY_X_ANLPAR_ACK 0x4000
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#define PHY_X_ANLPAR_RF_MASK 0x3000
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#define PHY_X_ANLPAR_PAUSE_MASK 0x0180
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#define PHY_X_ANLPAR_HD 0x0040
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#define PHY_X_ANLPAR_FD 0x0020
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#define PHY_ANLPAR_PSB_MASK 0x001f
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#define PHY_ANLPAR_PSB_802_3 0x0001
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#define PHY_ANLPAR_PSB_802_9 0x0002
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/* phy 1000BTCR */
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#define PHY_1000BTCR_1000FD 0x0200
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#define PHY_1000BTCR_1000HD 0x0100
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/* phy 1000BTSR */
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#define PHY_1000BTSR_MSCF 0x8000
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#define PHY_1000BTSR_MSCR 0x4000
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@@ -149,4 +165,10 @@ int bb_miiphy_write (char *devname, unsigned char addr,
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#define PHY_1000BTSR_1000FD 0x0800
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#define PHY_1000BTSR_1000HD 0x0400
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/* phy EXSR */
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#define PHY_EXSR_1000XF 0x8000
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#define PHY_EXSR_1000XH 0x4000
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#define PHY_EXSR_1000TF 0x2000
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#define PHY_EXSR_1000TH 0x1000
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#endif
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