Merge branch 'master' of git://git.denx.de/u-boot-arm
This commit is contained in:
@@ -1,11 +0,0 @@
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/************************************************
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* NAME : arm925t.h
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* Version : 23 June 2003 *
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************************************************/
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#ifndef __ARM925T_H__
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#define __ARM925T_H__
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void archflashwp(void *archdata, int wp);
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#endif /*__ARM925T_H__*/
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@@ -46,7 +46,7 @@
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"nandboot=echo Booting from nand ...; " \
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"run nandargs; " \
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"nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \
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"bootm ${loadaddr}\0" \
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"bootz ${loadaddr}\0" \
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"nandimgsize=0x500000\0"
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#else
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#define NANDARGS ""
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@@ -61,8 +61,9 @@
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"fdt_high=0xffffffff\0" \
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"boot_fdt=try\0" \
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"rdaddr=0x81000000\0" \
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"bootpart=0:2\0" \
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"bootdir=/boot\0" \
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"bootfile=uImage\0" \
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"bootfile=zImage\0" \
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"fdtfile=undefined\0" \
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"console=ttyO0,115200n8\0" \
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"optargs=\0" \
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@@ -71,7 +72,6 @@
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"mmcdev=0\0" \
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"mmcroot=/dev/mmcblk0p2 ro\0" \
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"mmcrootfstype=ext4 rootwait\0" \
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"bootpart=0:2\0" \
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"rootpath=/export/rootfs\0" \
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"nfsopts=nolock\0" \
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"static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
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@@ -106,21 +106,21 @@
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"root=${ramroot} " \
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"rootfstype=${ramrootfstype}\0" \
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"loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
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"loaduimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
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"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
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"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
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"mmcloados=run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootm ${loadaddr} - ${fdtaddr}; " \
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"bootz ${loadaddr} - ${fdtaddr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootm; " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootm; " \
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"bootz; " \
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"fi;\0" \
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"mmcboot=mmc dev ${mmcdev}; " \
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"if mmc rescan; then " \
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@@ -133,7 +133,7 @@
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"echo Running uenvcmd ...;" \
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"run uenvcmd;" \
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"fi;" \
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"if run loaduimage; then " \
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"if run loadimage; then " \
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"run mmcloados;" \
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"fi;" \
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"fi;\0" \
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@@ -141,17 +141,17 @@
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"run spiargs; " \
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"sf probe ${spibusno}:0; " \
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"sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \
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"bootm ${loadaddr}\0" \
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"bootz ${loadaddr}\0" \
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"netboot=echo Booting from network ...; " \
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"setenv autoload no; " \
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"dhcp; " \
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"tftp ${loadaddr} ${bootfile}; " \
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"tftp ${fdtaddr} ${fdtfile}; " \
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"run netargs; " \
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"bootm ${loadaddr} - ${fdtaddr}\0" \
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"bootz ${loadaddr} - ${fdtaddr}\0" \
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"ramboot=echo Booting from ramdisk ...; " \
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"run ramargs; " \
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"bootm ${loadaddr} ${rdaddr} ${fdtaddr}\0" \
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"bootz ${loadaddr} ${rdaddr} ${fdtaddr}\0" \
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"findfdt="\
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"if test $board_name = A335BONE; then " \
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"setenv fdtfile am335x-bone.dtb; fi; " \
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@@ -1,166 +0,0 @@
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/*
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* (C) Copyright 2003
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* Texas Instruments.
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* Kshitij Gupta <kshitij@ti.com>
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* Configuation settings for the TI OMAP Innovator board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
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#define CONFIG_OMAP 1 /* in a TI OMAP core */
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#define CONFIG_OMAP1510 1 /* which is in a 1510 (helen) */
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#define CONFIG_INNOVATOROMAP1510 1 /* a Innovator Board */
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/* input clock of PLL */
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#define CONFIG_SYS_CLK_FREQ 12000000 /* the OMAP1510 Innovator has 12MHz input clock */
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#define CONFIG_MISC_INIT_R
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
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/*
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* Hardware drivers
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*/
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/*
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#define CONFIG_DRIVER_SMC9196
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#define CONFIG_SMC9196_BASE 0x08000300
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#define CONFIG_SMC9196_EXT_PHY
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*/
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#define CONFIG_LAN91C96
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#define CONFIG_LAN91C96_BASE 0x08000300
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#define CONFIG_LAN91C96_EXT_PHY
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/*
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* NS16550 Configuration
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*/
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */
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#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
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/*
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* select serial console configuration
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*/
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#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1510 Innovator */
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_DHCP
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#define CONFIG_BOOTP_BOOTPATH
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#include <configs/omap1510.h>
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTARGS "console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=bootp"
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#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
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#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
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/* what's this ? it's not used anywhere */
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#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "OMAP1510 Innovator # " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
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#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
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/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
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* This time is further subdivided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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#define CONFIG_SYS_HZ 1000
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
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#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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#define PHYS_SRAM 0x20000000
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
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#define PHYS_FLASH_SIZE 0x01000000 /* 16MB */
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#define PHYS_FLASH_SECT_SIZE (128*1024) /* Size of a sector (128kB) */
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#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SECT_SIZE)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
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#define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */
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#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE }
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/*-----------------------------------------------------------------------
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* FLASH driver setup
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*/
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#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
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#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
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#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE /* Total Size of Environment Sector */
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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#define CONFIG_ENV_OFFSET ( CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN ) /* Environment after Monitor */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
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#endif /* __CONFIG_H */
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@@ -7,6 +7,7 @@
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#define __CONFIG_H
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#include <asm/arch/socfpga_base_addrs.h>
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#include "../../board/altera/socfpga/pinmux_config.h"
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/*
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* High level configuration
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