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85xx: Remove cache config from configs.h

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Either use the standard defines in asm/cache.h or grab the information
at runtime from the L1CFG SPR.

Also, minor cleanup in cache.h to make the code a bit more readable.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
2008-01-08 01:22:21 -06:00
committed by Andrew Fleming-AFLEMING
parent b964e9368f
commit b009f3eca9
19 changed files with 15 additions and 120 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
include/asm-ppc/cache.h
View File

@@ -8,15 +8,13 @@
#include <asm/processor.h>
/* bytes per L1 cache line */
#if !(defined(CONFIG_8xx) || defined(CONFIG_IOP480))
#if defined(CONFIG_PPC64BRIDGE)
#if defined(CONFIG_8xx) || defined(CONFIG_IOP480)
#define L1_CACHE_SHIFT 4
#elif defined(CONFIG_PPC64BRIDGE)
#define L1_CACHE_SHIFT 7
#else
#define L1_CACHE_SHIFT 5
#endif /* PPC64 */
#else
#define L1_CACHE_SHIFT 4
#endif /* !(8xx || IOP480) */
#endif
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)

4
include/asm-ppc/processor.h
View File

@@ -424,6 +424,8 @@
#define SPRN_IVOR15 0x19f /* Interrupt Vector Offset Register 15 */
/* e500 definitions */
#define SPRN_L1CFG0 0x203 /* L1 Cache Configuration Register 0 */
#define SPRN_L1CFG1 0x204 /* L1 Cache Configuration Register 1 */
#define SPRN_L1CSR0 0x3f2 /* L1 Data Cache Control and Status Register 0 */
#define L1CSR0_CPE 0x00010000 /* Data Cache Parity Enable */
#define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */
@@ -621,6 +623,8 @@
#define MCSRR1 SPRN_MCSRR1
#define L1CSR0 SPRN_L1CSR0
#define L1CSR1 SPRN_L1CSR1
#define L1CFG0 SPRN_L1CFG0
#define L1CFG1 SPRN_L1CFG1
#define MCSR SPRN_MCSR
#define MMUCSR0 SPRN_MMUCSR0
#define BUCSR SPRN_BUCSR

7
include/configs/MPC8540ADS.h
View File

@@ -460,13 +460,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
/*
* Internal Definitions
*

7
include/configs/MPC8540EVAL.h
View File

@@ -319,13 +319,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Internal Definitions
*

7
include/configs/MPC8541CDS.h
View File

@@ -450,13 +450,6 @@ extern unsigned long get_clock_freq(void);
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
/*
* Internal Definitions
*

7
include/configs/MPC8544DS.h
View File

@@ -444,13 +444,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
/*
* Internal Definitions
*

7
include/configs/MPC8548CDS.h
View File

@@ -512,13 +512,6 @@ extern unsigned long get_clock_freq(void);
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
/*
* Internal Definitions
*

7
include/configs/MPC8555CDS.h
View File

@@ -450,13 +450,6 @@ extern unsigned long get_clock_freq(void);
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
/*
* Internal Definitions
*

7
include/configs/MPC8560ADS.h
View File

@@ -490,13 +490,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
/*
* Internal Definitions
*

7
include/configs/MPC8568MDS.h
View File

@@ -480,13 +480,6 @@ extern unsigned long get_clock_freq(void);
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
/*
* Internal Definitions
*

7
include/configs/MPC8641HPCN.h
View File

@@ -573,13 +573,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
/*
* Internal Definitions
*

7
include/configs/PM854.h
View File

@@ -366,13 +366,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
/*
* Internal Definitions
*

7
include/configs/PM856.h
View File

@@ -365,13 +365,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
/*
* Internal Definitions
*

7
include/configs/SBC8540.h
View File

@@ -395,13 +395,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Internal Definitions
*

7
include/configs/TQM85xx.h
View File

@@ -417,13 +417,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value */
#endif
/*
* Internal Definitions
*

7
include/configs/sbc8560.h
View File

@@ -377,13 +377,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Internal Definitions
*

7
include/configs/stxgp3.h
View File

@@ -357,13 +357,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Internal Definitions
*

7
include/configs/stxssa.h
View File

@@ -391,13 +391,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Internal Definitions
*