ColdFire: Update Freescale MCF52x2 platforms
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
This commit is contained in:
TsiChungLiew
John Rigby
@@ -31,7 +31,6 @@
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#ifndef _M5271EVB_H
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#define _M5271EVB_H
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#define DEBUG
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#undef DEBUG
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/*
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@@ -41,17 +40,15 @@
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#define CONFIG_M5271 /* define processor type */
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#define CONFIG_M5271EVB /* define board type */
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#define CONFIG_IPADDR 192.168.30.1
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#define CONFIG_SERVERIP 192.168.1.1
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#define CONFIG_ETHADDR 00:06:3b:01:41:55
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#define CONFIG_MCFTMR
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#define CONFIG_MCFUART
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#define CFG_UART_PORT (0)
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#define CONFIG_BAUDRATE 19200
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#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
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#undef CONFIG_WATCHDOG /* disable watchdog */
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#define CONFIG_BOOTDELAY 5
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/* Configuration for environment
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* Environment is embedded in u-boot in the second sector of the flash
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*/
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@@ -73,7 +70,6 @@
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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@@ -81,22 +77,83 @@
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_MISC
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_LOADB
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#define CONFIG_MCFFEC
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#ifdef CONFIG_MCFFEC
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# define CONFIG_NET_MULTI 1
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# define CONFIG_MII 1
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# define CFG_DISCOVER_PHY
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# define CFG_RX_ETH_BUFFER 8
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# define CFG_FAULT_ECHO_LINK_DOWN
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# define CFG_FEC0_PINMUX 0
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# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
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# define MCFFEC_TOUT_LOOP 50000
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/* If CFG_DISCOVER_PHY is not defined - hardcoded */
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# ifndef CFG_DISCOVER_PHY
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# define FECDUPLEX FULL
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# define FECSPEED _100BASET
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# else
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# ifndef CFG_FAULT_ECHO_LINK_DOWN
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# define CFG_FAULT_ECHO_LINK_DOWN
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# endif
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# endif /* CFG_DISCOVER_PHY */
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#endif
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/* I2C */
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#define CONFIG_FSL_I2C
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#define CONFIG_HARD_I2C /* I2C with hw support */
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CFG_I2C_SPEED 80000
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#define CFG_I2C_SLAVE 0x7F
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#define CFG_I2C_OFFSET 0x00000300
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#define CFG_IMMR CFG_MBAR
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#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
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#define CONFIG_BOOTFILE "u-boot.bin"
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#ifdef CONFIG_MCFFEC
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# define CONFIG_NET_RETRY_COUNT 5
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# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
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# define CONFIG_IPADDR 192.162.1.2
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# define CONFIG_NETMASK 255.255.255.0
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# define CONFIG_SERVERIP 192.162.1.1
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# define CONFIG_GATEWAYIP 192.162.1.1
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# define CONFIG_OVERWRITE_ETHADDR_ONCE
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#endif /* FEC_ENET */
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#define CONFIG_HOSTNAME M5235EVB
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"loadaddr=10000\0" \
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"u-boot=u-boot.bin\0" \
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"load=tftp ${loadaddr) ${u-boot}\0" \
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"upd=run load; run prog\0" \
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"prog=prot off ffe00000 ffe2ffff;" \
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"era ffe00000 ffe2ffff;" \
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"cp.b ${loadaddr} 0 ${filesize};" \
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"save\0" \
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""
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#define CFG_PROMPT "=> "
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_LONGHELP /* undef to save memory */
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#if defined(CONFIG_CMD_KGDB)
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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#else
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#endif
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_LOAD_ADDR 0x00100000
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@@ -114,16 +171,11 @@
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#define CFG_MBAR 0x40000000 /* Register Base Addrs */
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/* Enable FEC ethernet */
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#define FEC_ENET
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#define CONFIG_NET_RETRY_COUNT 5
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#define CFG_ENET_BD_BASE 0x480000
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/*
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* Definitions for initial stack pointer and data area (in DPRAM)
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*/
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#define CFG_INIT_RAM_ADDR 0x20000000
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#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
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#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
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#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
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#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
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#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
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@@ -134,7 +186,7 @@
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* Please note that CFG_SDRAM_BASE _must_ start at 0
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*/
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#define CFG_SDRAM_BASE 0x00000000
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#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
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#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
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#define CFG_FLASH_BASE 0xffe00000
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#ifdef CONFIG_MONITOR_IS_IN_RAM
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@@ -152,11 +204,11 @@
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization ??
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*/
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#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
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/* FLASH organization */
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
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#define CFG_FLASH_ERASE_TOUT 1000
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#define CFG_FLASH_CFI 1
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@@ -169,4 +221,4 @@
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/* Port configuration */
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#define CFG_FECI2C 0xF0
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#endif /* _M5271EVB_H */
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#endif /* _M5271EVB_H */
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@@ -33,18 +33,20 @@
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_MCF52x2 /* define processor family */
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#define CONFIG_M5272 /* define processor type */
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#define CONFIG_MCF52x2 /* define processor family */
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#define CONFIG_M5272 /* define processor type */
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#define FEC_ENET
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#define CONFIG_MCFTMR
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#define CONFIG_MCFUART
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#define CFG_UART_PORT (0)
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#define CONFIG_BAUDRATE 19200
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#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
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#define CONFIG_WATCHDOG
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#undef CONFIG_WATCHDOG
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#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
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#define CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
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#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
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/* Configuration for environment
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* Environment is embedded in u-boot in the second sector of the flash
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@@ -60,7 +62,6 @@
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#define CFG_ENV_IS_IN_FLASH 1
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#endif
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/*
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* BOOTP options
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*/
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@@ -69,37 +70,82 @@
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_MISC
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_MEMORY
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_LOADB
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#define CONFIG_BOOTDELAY 5
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#define CONFIG_MCFFEC
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#ifdef CONFIG_MCFFEC
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# define CONFIG_NET_MULTI 1
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# define CONFIG_MII 1
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# define CFG_DISCOVER_PHY
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# define CFG_RX_ETH_BUFFER 8
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# define CFG_FAULT_ECHO_LINK_DOWN
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# define CFG_FEC0_PINMUX 0
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# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
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# define MCFFEC_TOUT_LOOP 50000
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/* If CFG_DISCOVER_PHY is not defined - hardcoded */
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# ifndef CFG_DISCOVER_PHY
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# define FECDUPLEX FULL
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# define FECSPEED _100BASET
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# else
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# ifndef CFG_FAULT_ECHO_LINK_DOWN
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# define CFG_FAULT_ECHO_LINK_DOWN
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# endif
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# endif /* CFG_DISCOVER_PHY */
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#endif
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#ifdef CONFIG_MCFFEC
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# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
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# define CONFIG_IPADDR 192.162.1.2
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# define CONFIG_NETMASK 255.255.255.0
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# define CONFIG_SERVERIP 192.162.1.1
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# define CONFIG_GATEWAYIP 192.162.1.1
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# define CONFIG_OVERWRITE_ETHADDR_ONCE
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#endif /* CONFIG_MCFFEC */
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#define CONFIG_HOSTNAME M5272C3
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"loadaddr=10000\0" \
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"u-boot=u-boot.bin\0" \
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"load=tftp ${loadaddr) ${u-boot}\0" \
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"upd=run load; run prog\0" \
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"prog=prot off ffe00000 ffe3ffff;" \
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"era ffe00000 ffe3ffff;" \
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"cp.b ${loadaddr} ffe00000 ${filesize};"\
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"save\0" \
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""
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#define CFG_PROMPT "-> "
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_LONGHELP /* undef to save memory */
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#if defined(CONFIG_CMD_KGDB)
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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#else
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#endif
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_LOAD_ADDR 0x20000
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#define CFG_MEMTEST_START 0x400
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#define CFG_MEMTEST_END 0x380000
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#define CFG_HZ 1000
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#define CFG_CLK 66000000
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@@ -108,20 +154,15 @@
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* (address mappings, register initial values, etc.)
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* You should know what you are doing if you make changes here.
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*/
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#define CFG_MBAR 0x10000000 /* Register Base Addrs */
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#define CFG_SCR 0x0003;
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#define CFG_SPR 0xffff;
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#define CFG_DISCOVER_PHY
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#define CFG_ENET_BD_BASE 0x380000
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/*-----------------------------------------------------------------------
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* Definitions for initial stack pointer and data area (in DPRAM)
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*/
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#define CFG_INIT_RAM_ADDR 0x20000000
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#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
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#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
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#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
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#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
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#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
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@@ -132,7 +173,7 @@
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* Please note that CFG_SDRAM_BASE _must_ start at 0
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*/
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#define CFG_SDRAM_BASE 0x00000000
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#define CFG_SDRAM_SIZE 4 /* SDRAM size in MB */
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#define CFG_SDRAM_SIZE 4 /* SDRAM size in MB */
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#define CFG_FLASH_BASE 0xffe00000
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#ifdef CONFIG_MONITOR_IS_IN_RAM
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@@ -150,13 +191,13 @@
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization ??
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*/
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#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
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#define CFG_FLASH_ERASE_TOUT 1000
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/*-----------------------------------------------------------------------
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@@ -169,25 +210,18 @@
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*/
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#define CFG_BR0_PRELIM 0xFFE00201
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#define CFG_OR0_PRELIM 0xFFE00014
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#define CFG_BR1_PRELIM 0
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#define CFG_OR1_PRELIM 0
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#define CFG_BR2_PRELIM 0x30000001
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#define CFG_OR2_PRELIM 0xFFF80000
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#define CFG_BR3_PRELIM 0
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#define CFG_OR3_PRELIM 0
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#define CFG_BR4_PRELIM 0
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#define CFG_OR4_PRELIM 0
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#define CFG_BR5_PRELIM 0
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#define CFG_OR5_PRELIM 0
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#define CFG_BR6_PRELIM 0
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#define CFG_OR6_PRELIM 0
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#define CFG_BR7_PRELIM 0x00000701
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#define CFG_OR7_PRELIM 0xFFC0007C
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@@ -197,9 +231,8 @@
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#define CFG_PACNT 0x00000000
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#define CFG_PADDR 0x0000
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#define CFG_PADAT 0x0000
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#define CFG_PBCNT 0x55554155 /* Ethernet/UART configuration */
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#define CFG_PBCNT 0x55554155 /* Ethernet/UART configuration */
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#define CFG_PBDDR 0x0000
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#define CFG_PBDAT 0x0000
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#define CFG_PDCNT 0x00000000
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#endif /* _M5272C3_H */
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#endif /* _M5272C3_H */
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@@ -33,15 +33,17 @@
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_MCF52x2 /* define processor family */
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#define CONFIG_M5282 /* define processor type */
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#define CONFIG_MCF52x2 /* define processor family */
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#define CONFIG_M5282 /* define processor type */
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#define FEC_ENET
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#define CONFIG_MCFTMR
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#define CONFIG_MCFUART
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#define CFG_UART_PORT (0)
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#define CONFIG_BAUDRATE 19200
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#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
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#define CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
|
||||
#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
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||||
|
||||
/* Configuration for environment
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* Environment is embedded in u-boot in the second sector of the flash
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||||
@@ -50,7 +52,6 @@
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#define CFG_ENV_SIZE 0x2000
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#define CFG_ENV_IS_IN_FLASH 1
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/*
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* BOOTP options
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*/
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@@ -59,29 +60,73 @@
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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||||
* Command line configuration.
|
||||
*/
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||||
#include <config_cmd_default.h>
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||||
#define CONFIG_CMD_NET
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||||
#define CONFIG_CMD_PING
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||||
#define CONFIG_CMD_MII
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||||
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_LOADB
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#define CONFIG_MCFFEC
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#ifdef CONFIG_MCFFEC
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# define CONFIG_NET_MULTI 1
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# define CONFIG_MII 1
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||||
# define CFG_DISCOVER_PHY
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||||
# define CFG_RX_ETH_BUFFER 8
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||||
# define CFG_FAULT_ECHO_LINK_DOWN
|
||||
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||||
# define CFG_FEC0_PINMUX 0
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||||
# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
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||||
# define MCFFEC_TOUT_LOOP 50000
|
||||
/* If CFG_DISCOVER_PHY is not defined - hardcoded */
|
||||
# ifndef CFG_DISCOVER_PHY
|
||||
# define FECDUPLEX FULL
|
||||
# define FECSPEED _100BASET
|
||||
# else
|
||||
# ifndef CFG_FAULT_ECHO_LINK_DOWN
|
||||
# define CFG_FAULT_ECHO_LINK_DOWN
|
||||
# endif
|
||||
# endif /* CFG_DISCOVER_PHY */
|
||||
#endif
|
||||
|
||||
#define CONFIG_BOOTDELAY 5
|
||||
#ifdef CONFIG_MCFFEC
|
||||
# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
|
||||
# define CONFIG_IPADDR 192.162.1.2
|
||||
# define CONFIG_NETMASK 255.255.255.0
|
||||
# define CONFIG_SERVERIP 192.162.1.1
|
||||
# define CONFIG_GATEWAYIP 192.162.1.1
|
||||
# define CONFIG_OVERWRITE_ETHADDR_ONCE
|
||||
#endif /* CONFIG_MCFFEC */
|
||||
|
||||
#define CONFIG_HOSTNAME M5272C3
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"netdev=eth0\0" \
|
||||
"loadaddr=10000\0" \
|
||||
"u-boot=u-boot.bin\0" \
|
||||
"load=tftp ${loadaddr) ${u-boot}\0" \
|
||||
"upd=run load; run prog\0" \
|
||||
"prog=prot off ffe00000 ffe3ffff;" \
|
||||
"era ffe00000 ffe3ffff;" \
|
||||
"cp.b ${loadaddr} ffe00000 ${filesize};"\
|
||||
"save\0" \
|
||||
""
|
||||
|
||||
#define CFG_PROMPT "-> "
|
||||
#define CFG_LONGHELP /* undef to save memory */
|
||||
#define CFG_LONGHELP /* undef to save memory */
|
||||
|
||||
#if defined(CONFIG_CMD_KGDB)
|
||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
#else
|
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#endif
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
|
||||
#define CFG_MAXARGS 16 /* max number of command args */
|
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
|
||||
#define CFG_MAXARGS 16 /* max number of command args */
|
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
|
||||
|
||||
#define CFG_LOAD_ADDR 0x20000
|
||||
|
||||
@@ -91,6 +136,10 @@
|
||||
#define CFG_HZ 1000000
|
||||
#define CFG_CLK 64000000
|
||||
|
||||
/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
|
||||
|
||||
#define CFG_MFD 0x02 /* PLL Multiplication Factor Devider */
|
||||
#define CFG_RFD 0x00 /* PLL Reduce Frecuency Devider */
|
||||
|
||||
/*
|
||||
* Low Level Configuration Settings
|
||||
@@ -99,15 +148,12 @@
|
||||
*/
|
||||
#define CFG_MBAR 0x40000000
|
||||
|
||||
#undef CFG_DISCOVER_PHY
|
||||
#define CFG_ENET_BD_BASE 0x380000
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Definitions for initial stack pointer and data area (in DPRAM)
|
||||
*/
|
||||
#define CFG_INIT_RAM_ADDR 0x20000000
|
||||
#define CFG_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
|
||||
#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
|
||||
#define CFG_INIT_RAM_ADDR 0x20000000
|
||||
#define CFG_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
|
||||
#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
|
||||
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
|
||||
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
|
||||
|
||||
@@ -117,49 +163,88 @@
|
||||
* Please note that CFG_SDRAM_BASE _must_ start at 0
|
||||
*/
|
||||
#define CFG_SDRAM_BASE 0x00000000
|
||||
#define CFG_SDRAM_SIZE 4 /* SDRAM size in MB */
|
||||
#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */
|
||||
#define CFG_FLASH_BASE 0xffe00000
|
||||
#define CFG_INT_FLASH_BASE 0xf0000000
|
||||
#define CFG_INT_FLASH_ENABLE 0x21
|
||||
|
||||
/* If M5282 port is fully implemented the monitor base will be behind
|
||||
* the vector table. */
|
||||
/* #define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) */
|
||||
#define CFG_MONITOR_BASE 0x20000
|
||||
#if (TEXT_BASE != CFG_INT_FLASH_BASE)
|
||||
#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
|
||||
#else
|
||||
#define CFG_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */
|
||||
#endif
|
||||
|
||||
#define CFG_MONITOR_LEN 0x20000
|
||||
#define CFG_MALLOC_LEN (256 << 10)
|
||||
#define CFG_BOOTPARAMS_LEN 64*1024
|
||||
|
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data
|
||||
* have to be in the first 8 MB of memory, since this is
|
||||
* the maximum mapped by the Linux kernel during initialization ??
|
||||
*/
|
||||
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
|
||||
|
||||
#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
*/
|
||||
#define CFG_MAX_FLASH_SECT 35
|
||||
#define CFG_MAX_FLASH_BANKS 1
|
||||
#define CFG_FLASH_ERASE_TOUT 10000000
|
||||
#define CFG_FLASH_CFI
|
||||
#ifdef CFG_FLASH_CFI
|
||||
|
||||
# define CFG_FLASH_CFI_DRIVER 1
|
||||
# define CFG_FLASH_SIZE 0x1000000 /* Max size that the board might have */
|
||||
# define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT
|
||||
# define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
# define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
|
||||
# define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
|
||||
# define CFG_FLASH_CHECKSUM
|
||||
# define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Cache Configuration
|
||||
*/
|
||||
#define CFG_CACHELINE_SIZE 16
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Memory bank definitions
|
||||
*/
|
||||
|
||||
|
||||
#define CFG_CS0_BASE CFG_FLASH_BASE
|
||||
#define CFG_CS0_SIZE 2*1024*1024
|
||||
#define CFG_CS0_WIDTH 16
|
||||
#define CFG_CS0_RO 0
|
||||
#define CFG_CS0_WS 6
|
||||
/*
|
||||
#define CFG_CS3_BASE 0xE0000000
|
||||
#define CFG_CS3_SIZE 1*1024*1024
|
||||
#define CFG_CS3_WIDTH 16
|
||||
#define CFG_CS3_RO 0
|
||||
#define CFG_CS3_WS 6
|
||||
*/
|
||||
/*-----------------------------------------------------------------------
|
||||
* Port configuration
|
||||
*/
|
||||
#define CFG_PACNT 0x0000000 /* Port A D[31:24] */
|
||||
#define CFG_PADDR 0x0000000
|
||||
#define CFG_PADAT 0x0000000
|
||||
|
||||
#define CFG_PBCNT 0x0000000 /* Port B D[23:16] */
|
||||
#define CFG_PBDDR 0x0000000
|
||||
#define CFG_PBDAT 0x0000000
|
||||
|
||||
#endif /* _CONFIG_M5282EVB_H */
|
||||
#define CFG_PCCNT 0x0000000 /* Port C D[15:08] */
|
||||
#define CFG_PCDDR 0x0000000
|
||||
#define CFG_PCDAT 0x0000000
|
||||
|
||||
#define CFG_PDCNT 0x0000000 /* Port D D[07:00] */
|
||||
#define CFG_PCDDR 0x0000000
|
||||
#define CFG_PCDAT 0x0000000
|
||||
|
||||
#define CFG_PEHLPAR 0xC0
|
||||
#define CFG_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */
|
||||
#define CFG_DDRUA 0x05
|
||||
#define CFG_PJPAR 0xFF;
|
||||
|
||||
#endif /* _CONFIG_M5282EVB_H */
|
||||
|
||||
Reference in New Issue
Block a user