T1040QDS is a high-performance computing evaluation, development and
test platform supporting the T1040 QorIQ Power Architecture™ processor.
T1040QDS board Overview
-----------------------
- Four e5500 cores, each with a private 256 KB L2 cache
- 256 KB shared L3 CoreNet platform cache (CPC)
- Interconnect CoreNet platform
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
for the following functions:
- Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing, and congestion
management
- Cryptography Acceleration
- RegEx Pattern Matching Acceleration
- IEEE Std 1588 support
- Hardware buffer management for buffer allocation and deallocation
- Ethernet interfaces
- Integrated 8-port Gigabit Ethernet switch
- Four 1 Gbps Ethernet controllers
- SERDES Connections, 8 lanes supporting:
— PCI Express: supporting Gen 1 and Gen 2;
— SGMII
— QSGMII
— SATA 2.0
— Aurora debug with dedicated connectors
- DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
Interleaving
-IFC/Local Bus
- NAND flash: 8-bit, async, up to 2GB.
- NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
- GASIC: Simple (minimal) target within Qixis FPGA
- PromJET rapid memory download support
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- QIXIS System Logic FPGA
- Clocks
- System and DDR clock (SYSCLK, “DDRCLK”)
- SERDES clocks
- Power Supplies
- Video
- DIU supports video at up to 1280x1024x32bpp
- USB
- Supports two USB 2.0 ports with integrated PHYs
— Two type A ports with 5V@1.5A per port.
— Second port can be converted to OTG mini-AB
- SDHC
- SDHC port connects directly to an adapter card slot, featuring:
- Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC
— Supporting eMMC memory devices
- SPI
- On-board support of 3 different devices and sizes
- Other IO
- Two Serial ports
- ProfiBus port
- Four I2C ports
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: fix conflict in boards.cfg]
Acked-by-by: York Sun <yorksun@freescale.com>
55 lines
1.2 KiB
Makefile
55 lines
1.2 KiB
Makefile
#
|
|
# Copyright 2009-2011 Freescale Semiconductor, Inc.
|
|
#
|
|
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
|
|
include $(TOPDIR)/config.mk
|
|
|
|
LIB := $(obj)libfm.o
|
|
|
|
ifdef CONFIG_FMAN_ENET
|
|
COBJS-y += dtsec.o
|
|
COBJS-y += eth.o
|
|
COBJS-y += fm.o
|
|
COBJS-y += init.o
|
|
COBJS-y += tgec.o
|
|
COBJS-y += tgec_phy.o
|
|
|
|
# Soc have FMAN v3 with mEMAC
|
|
COBJS-$(CONFIG_SYS_FMAN_V3) += memac_phy.o
|
|
COBJS-$(CONFIG_SYS_FMAN_V3) += memac.o
|
|
|
|
# SoC specific SERDES support
|
|
COBJS-$(CONFIG_P1017) += p1023.o
|
|
COBJS-$(CONFIG_P1023) += p1023.o
|
|
# The P204x, P304x, and P5020 are the same
|
|
COBJS-$(CONFIG_PPC_P2041) += p5020.o
|
|
COBJS-$(CONFIG_PPC_P3041) += p5020.o
|
|
COBJS-$(CONFIG_PPC_P4080) += p4080.o
|
|
COBJS-$(CONFIG_PPC_P5020) += p5020.o
|
|
COBJS-$(CONFIG_PPC_P5040) += p5040.o
|
|
COBJS-$(CONFIG_PPC_T1040) += t1040.o
|
|
COBJS-$(CONFIG_PPC_T4240) += t4240.o
|
|
COBJS-$(CONFIG_PPC_T4160) += t4240.o
|
|
COBJS-$(CONFIG_PPC_B4420) += b4860.o
|
|
COBJS-$(CONFIG_PPC_B4860) += b4860.o
|
|
endif
|
|
|
|
COBJS := $(COBJS-y)
|
|
SRCS := $(COBJS:.o=.c)
|
|
OBJS := $(addprefix $(obj),$(COBJS))
|
|
|
|
all: $(LIB)
|
|
|
|
$(LIB): $(obj).depend $(OBJS)
|
|
$(call cmd_link_o_target, $(OBJS))
|
|
|
|
#########################################################################
|
|
|
|
include $(SRCTREE)/rules.mk
|
|
|
|
sinclude $(obj).depend
|
|
|
|
#########################################################################
|