Enric Balletbo i Serra 94b32f60fe ARM: IGEP0033: Update timing to run DDR at 400MHz. ...

We can run the DDR at 400MHz, so update the timings for that purpose.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>

2013-10-07 07:43:46 -04:00

..

igep00x0

OMAP3: igep00x0: allow booting with a FDT from MMC

2013-08-15 18:38:35 -04:00

igep0033

ARM: IGEP0033: Update timing to run DDR at 400MHz.

2013-10-07 07:43:46 -04:00