Jagan Teki 46d0a9913c spi: Add zynq qspi controller driver ...

Added zynq qspi controller driver for Xilinx Zynq APSOC,
this driver is driver-model driven with devicetree support.

=> sf probe
SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB
=> mw.b 0x100 0xCC 0x1000000
=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 59.842s, speed 289262 B/s
=> sf read 0x3000000 0x0 0x1000000
device 0 whole chip
SF: 16777216 bytes @ 0x0 Read: OK
=> cmp.b 0x3000000 0x100 0x1000000
Total of 16777216 byte(s) were the same

Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>

2015-10-25 20:17:01 +05:30

..

altera_spi.c

spi : convert altera_spi to driver model

2015-10-23 07:36:56 +08:00

armada100_spi.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

atmel_dataflash_spi.c

spi: atmel_dataflash: Simplify AT91F_SpiEnable implementation

2014-03-17 21:54:57 +05:30

atmel_spi.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

atmel_spi.h

spi, atmel: move CONFIG_SYS_SPI_WRITE_TOUT into common header

2014-11-17 08:47:16 -05:00

bfin_spi6xx.c

blackfin: add spi and i2c specific get clock functions

2014-02-20 06:46:56 +01:00

bfin_spi.c

blackfin: add spi and i2c specific get clock functions

2014-02-20 06:46:56 +01:00

cadence_qspi_apb.c

spi: cadence_qspi: support FIFO width other than 4 bytes

2015-07-03 13:50:53 +05:30

cadence_qspi.c

spi: cadence_qspi: get sram size from device tree

2015-07-03 13:50:53 +05:30

cadence_qspi.h

spi: cadence_qspi: get sram size from device tree

2015-07-03 13:50:53 +05:30

cf_qspi.c

spi: cf_qspi: fix clamp macro type check compilation warnings

2015-07-01 22:58:50 +05:30

cf_spi.c

spi: cf_spi: Staticize local functions

2015-03-30 01:42:49 +05:30

davinci_spi.c

bitops: introduce BIT() definition

2015-09-11 17:15:32 -04:00

designware_spi.c

dm: Use dev_get_addr() where possible

2015-08-31 07:57:26 -06:00

ep93xx_spi.c

bitops: introduce BIT() definition

2015-09-11 17:15:32 -04:00

exynos_spi.c

dm: Use dev_get_addr() where possible

2015-08-31 07:57:26 -06:00

fsl_dspi.c

dm: Use dev_get_addr() where possible

2015-08-31 07:57:26 -06:00

fsl_espi.c

linux/kernel.h: sync min, max, min3, max3 macros with Linux

2014-11-23 06:48:30 -05:00

fsl_qspi.c

dm: spi: Convert Freescale QSPI driver to driver model

2015-04-18 11:11:18 -06:00

fsl_qspi.h

qspi:fsl implement AHB read

2015-01-09 00:03:28 +05:30

ich.c

x86: spi: Add support for Wildcat Point

2015-10-21 07:46:27 -06:00

ich.h

x86: spi: Support ValleyView in ICH SPI driver

2015-02-06 12:07:38 -07:00

Kconfig

spi : convert altera_spi to driver model

2015-10-23 07:36:56 +08:00

kirkwood_spi.c

spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASE

2014-10-23 09:59:21 -04:00

lpc32xx_ssp.c

lpc32xx: add LPC32xx SSP support (SPI mode)

2015-04-10 14:23:20 +02:00

Makefile

spi: Add zynq qspi controller driver

2015-10-25 20:17:01 +05:30

mpc8xxx_spi.c

Coding Style cleanup: replace leading SPACEs by TABs

2013-10-14 16:06:54 -04:00

mpc52xx_spi.c

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24 09:44:38 -04:00

mxc_spi.c

linux/kernel.h: sync min, max, min3, max3 macros with Linux

2014-11-23 06:48:30 -05:00

mxs_spi.c

Move ALLOC_CACHE_ALIGN_BUFFER() to the new memalign.h header

2015-09-11 17:15:20 -04:00

omap3_spi.c

spi: omap3: Fix timeout handling

2015-04-27 21:08:42 +05:30

omap3_spi.h

spi: omap3_spi: add am43xx support to omap3_spi

2015-08-12 20:48:02 -04:00

rk_spi.c

rockchip: Add SPI driver

2015-09-02 21:28:24 -06:00

rk_spi.h

rockchip: Add SPI driver

2015-09-02 21:28:24 -06:00

sandbox_spi.c

dm: spi: Move the per-child data size to the uclass

2015-01-29 17:09:55 -07:00

sh_qspi.c

spi: sh_qspi: Add header file that defines the address of registers

2014-01-16 08:07:20 +09:00

sh_spi.c

spi: sh_spi: Use sh_spi_clear_bit() instead of open-coded

2014-01-11 12:21:31 +05:30

sh_spi.h

sh_spi: Add 4 chip select signals supporting

2012-03-26 10:09:31 +09:00

soft_spi_legacy.c

dm: spi: Remove SPI_INIT feature

2014-10-22 10:36:48 -06:00

soft_spi.c

dm: spi: Move slave details to child platdata

2015-01-29 17:09:56 -07:00

spi-emul-uclass.c

dm: sandbox: Add a SPI emulation uclass

2014-10-22 10:36:46 -06:00

spi-uclass.c

dm: spi: Make local functions static

2015-07-21 17:39:27 -06:00

spi.c

spi: Support half-duplex mode in FDT decode

2014-08-06 00:18:01 +05:30

tegra20_sflash.c

dm: Use dev_get_addr() where possible

2015-08-31 07:57:26 -06:00

tegra20_slink.c

spi: tegra20: Add support for mode selection

2015-10-11 16:43:06 +05:30

tegra114_spi.c

dm: Use dev_get_addr() where possible

2015-08-31 07:57:26 -06:00

tegra_spi.h

dm: tegra: spi: Convert to driver model

2014-10-22 10:36:52 -06:00

ti_qspi.c

spi: ti_qspi: Use DMA to read from qspi flash

2015-08-17 23:29:15 +05:30

xilinx_spi.c

spi: xilinx_spi: Fix to configure CPOL, CPHA mask

2015-10-11 16:43:06 +05:30

zynq_qspi.c

spi: Add zynq qspi controller driver

2015-10-25 20:17:01 +05:30

zynq_spi.c

spi: zynq_spi: Fix to configure CPOL, CPHA mask

2015-10-11 16:43:06 +05:30