Files
u-boot-tk1-som/arch
Simon Glass a9aff2f46a x86: dts: Add SPI flash MRC details for chromebook_link
Correct the SPI flash compatible string, add an alias and specify the
position of the MRC cache, used to store SDRAM training settings for the
Memory Reference Code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-24 06:13:45 -07:00
..
2015-01-15 22:40:50 +03:00
2015-01-13 09:37:21 -05:00