Peter Tyser a1c8a71926 86xx: Update CPU info output on bootup ...

- Update style of 86xx CPU information on boot to more closely
  match 85xx boards
- Fix detection of 8641/8641D
- Use strmhz() to display frequencies
- Display L1 information
- Display L2 cache size
- Fixed CPU/SVR version output

== Before ==
Freescale PowerPC
CPU:
    Core: E600 Core 0, Version: 0.2, (0x80040202)
    System: Unknown, Version: 2.1, (0x80900121)
    Clocks: CPU:1066 MHz, MPX: 533 MHz, DDR: 266 MHz, LBC: 133 MHz
    L2: Enabled
Board: X-ES XPedite5170 3U VPX SBC

== After ==
CPU:   8641D, Version: 2.1, (0x80900121)
Core:  E600 Core 0, Version: 2.2, (0x80040202)
Clock Configuration:
       CPU:1066.667 MHz, MPX:533.333 MHz
       DDR:266.667 MHz (533.333 MT/s data rate), LBC:133.333 MHz
L1:    D-cache 32 KB enabled
       I-cache 32 KB enabled
L2:    512 KB enabled
Board: X-ES XPedite5170 3U VPX SBC

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

2009-02-16 18:05:57 -06:00

..

4xx_pci.h

Big white-space cleanup.

2008-05-21 00:14:08 +02:00

4xx_pcie.h

rename CFG_ macros to CONFIG_SYS

2008-10-18 21:54:03 +02:00

5xx_immap.h

Big white-space cleanup.

2008-05-21 00:14:08 +02:00

8xx_immap.h

Patch by Yuli Barcohen, 19 Apr 2004:

2004-06-06 21:35:06 +00:00

atomic.h

Initial revision

2001-04-28 17:59:11 +00:00

bitops.h

PPC: Added fls, fls64, __ilog2_u64, and ffs64 to bitops

2008-07-01 21:47:12 +02:00

byteorder.h

Cleanup for GCC-4.x

2005-10-13 16:45:02 +02:00

cache.h

85xx: Add basic e500mc core support

2008-10-24 15:10:47 -05:00

config.h

85xx: Fix how we map DDR memory

2009-02-16 18:05:51 -06:00

cpm_85xx.h

Fix DPRAM offset/size for MPC8541/8555.

2005-12-06 15:02:31 +01:00

cpm_8260.h

POWERPC 82xx: add the SCC as an HDLC controller

2009-01-24 00:42:04 +01:00

e300.h

powerpc: Move duplicated BAT defines to mmu.h

2009-02-10 00:27:40 +01:00

errno.h

Initial revision

2000-08-21 15:05:47 +00:00

fsl_ddr_dimm_params.h

Pass dimm parameters to populate populate controller options

2008-10-18 21:54:04 +02:00

fsl_ddr_sdram.h

fsl-ddr: make the self refresh idle threshold configurable

2009-01-23 17:03:14 -06:00

fsl_i2c.h

Make fsl-i2c not conflict with SOFT I2C

2006-11-29 00:25:26 -06:00

fsl_law.h

mpc85xx: Add support for the P2020

2009-02-16 18:05:55 -06:00

fsl_lbc.h

85xx: Handle eLBC difference w/36-bit physical

2009-01-23 17:08:28 -06:00

fsl_serdes.h

mpc83xx: serdes: add forgotten shifts for rfcks

2008-10-21 18:34:01 -05:00

global_data.h

mpc83xx: Add support for MPC83xx PCI-E controllers

2009-01-21 18:43:49 -06:00

gpio.h

ppc4xx: Add AMCC Canyonlands support (460EX) (3/3)

2008-03-15 07:28:05 +01:00

immap_83xx.h

mpc83xx: Add support for MPC83xx PCI-E controllers

2009-01-21 18:43:49 -06:00

immap_85xx.h

mpc85xx: Add support for the P2020

2009-02-16 18:05:55 -06:00

immap_86xx.h

86xx: Update Global Utilities structure

2009-02-16 18:05:57 -06:00

immap_512x.h

ADS5121 Add PATA support

2009-02-03 15:40:29 -07:00

immap_8220.h

Patch by TsiChung Liew, 23 Sep 2004:

2004-10-28 00:09:35 +00:00

immap_8260.h

Patch by Thomas Viehweger, 14 May 2004:

2004-06-09 12:42:26 +00:00

immap_fsl_pci.h

Handle MPC85xx PCIe reset errata (PCI-Ex 38)

2007-12-11 22:34:20 -06:00

immap_qe.h

85xx: add ability to upload QE firmware

2008-01-09 16:28:12 -06:00

interrupt.h

ppc4xx: CPU PPC440x5 on Virtex5 FX

2008-07-18 12:30:50 +02:00

io.h

ppc: Use addrmap in virt_to_phys and map_physmem.

2008-12-19 18:20:08 -06:00

iopin_8xx.h

rename CFG_ macros to CONFIG_SYS

2008-10-18 21:54:03 +02:00

iopin_85xx.h

rename CFG_ macros to CONFIG_SYS

2008-10-18 21:54:03 +02:00

iopin_8260.h

rename CFG_ macros to CONFIG_SYS

2008-10-18 21:54:03 +02:00

m8260_pci.h

* Code cleanup:

2003-06-27 21:31:46 +00:00

mc146818rtc.h

Initial revision

2000-11-20 17:21:10 +00:00

mmu.h

mpc86xx: Add support to populate addr map based on BATs

2009-02-10 00:29:49 +01:00

mpc8xxx_spi.h

mpc83xx: Correct the struct spi8xxx in mpc8xxx_spi.h

2008-01-18 12:39:23 -06:00

mpc8349_pci.h

Added PCI support for MPC8349ADS board

2006-01-12 19:51:38 -06:00

pci_io.h

* Code cleanup:

2003-06-27 21:31:46 +00:00

pnp.h

* Code cleanup:

2003-06-27 21:31:46 +00:00

posix_types.h

Initial revision

2001-04-28 17:59:11 +00:00

ppc4xx-ebc.h

ppc4xx: Correctly setup ranges property in ebc node

2008-10-21 17:35:02 +02:00

ppc4xx-isram.h

ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs

2008-11-21 10:52:33 +01:00

ppc4xx-sdram.h

ppc4xx: Autocalibration can set RDCC to over aggressive value.

2009-02-12 06:08:07 +01:00

ppc4xx-uic.h

ppc4xx: CPU PPC440x5 on Virtex5 FX

2008-07-18 12:30:50 +02:00

processor.h

86xx: Update CPU info output on bootup

2009-02-16 18:05:57 -06:00

ptrace.h

Big white-space cleanup.

2008-05-21 00:14:08 +02:00

residual.h

* Code cleanup:

2003-06-27 21:31:46 +00:00

sigcontext.h

Big white-space cleanup.

2008-05-21 00:14:08 +02:00

signal.h

Initial revision

2001-04-28 17:59:11 +00:00

status_led.h

rename CFG_ macros to CONFIG_SYS

2008-10-18 21:54:03 +02:00

string.h

Initial revision

2000-08-21 15:05:47 +00:00

types.h

Introduce phys_size_t and move phys_addr_t into asm/types.h

2008-04-13 17:13:46 -07:00

u-boot.h

Adds two more ethernet interface to 83xx

2008-10-18 21:54:00 +02:00

xilinx_irq.h

ppc4xx: Minor coding style cleanup of Xilinx Virtex5 ml507 support

2008-07-18 12:31:25 +02:00