Measurements during HW basic test showed, that the SDRAM timing has to be optimized. This patch adapted these timings accordingly. Signed-off-by: Marco Schmid <marco.schmid@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>