The Colorado TK1 SOM is a small form factor board similar to the
Jetson TK1. The main differences lie in the pinmux, and in that the
PCIe controller is set to use in 4lanes+1lane, rather than 2+2.
The pinmux header here was generated from a spreadsheet provided by
Colorado Engineering using the tegra-pinmux scripts. The spreadsheet
was converted from v09 to v11 by me.
Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
After any operation that downloads a file (e.g., pxe get, or dhcp), the
buffer containing the downloaded data is flushed. This patch rounds
up the flushed size to a cacheline boundary, preventing a cache
misalignment message from u-boot.
Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
The call to flush cache on the transmit buffer was misplaced (for very
short packets) and asked to flush less than a cacheline.
Move the flush cache call to after a short packet has been padded
to minimum length (so the padding is flushed too), and round the size
up to a cacheline.
Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
The Linux-for-Tegra kernel uses a very long command line.
The default value of CONFIG_SYS_CBSIZE is too small to printf out the
long command line and causes a message like:
bootarg overflow 602+0+0+1 > 512
on the console, and the board refuses to boot.
The default value of CONFIG_SYS_MAXARGS is too small to add a long
long command line, and the kernel won't boot without the complete
bootargs.
Increasing these two config options solves this problem.
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Signed-off-by: Peter Chubb <Peter.Chubb@data61.csiro.au>
Acked-by: Stephen Warren <swarren@nvidia.com>
This will be useful, for example, to load firmware to DRAM and make
it visible to other agents.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This is very likely to be necessary for normal use cases.
Set its default to 'y' for shorter defconfig files.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The eMMC on sLD3 is assigned with dedicated pins (only multiplexed
with GPIO), so it shouldn't hurt to enable eMMC on SPL all the time.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Commit 76c52ce29f ("ARM: uniphier: increase CONFIG_SYS_MALLOC_F_LEN
to bind all nodes") missed to increase this config for sLD3.
This change is needed to add "u-boot,dm-pre-reloc" to some nodes;
more devices are bound, more malloc memory is needed.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The revision of the original support card (rev 3.5, rev 3.6) fits in
the 8 bit width revision register. When it was extended in a weird
way, it was versioned in the format of "3.6.x" (where it should have
been "3.7", of course). What is worse, only the sub-level version
"6.x" was recorded in the 8 bit width register, completely ignoring
the compatibility of the revision register format.
This patch saves madly-versioned support cards by assuming the major
version "3" when the MSB 4 bit of the register is read as "6". With
this, the support card revision that were displayed as "6.10" is now
corrected to "3.6.10".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This supports the system reset via PSCI for ARMv7 SoCs.
Because the system reset is not supported on PSCI 0.1, let's define
CONFIG_ARMV7_PSCI_1_0. (it is supported since PSCI 0.2, but there
is no CONFIG to enable it in U-Boot for now.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
With the CONFIG_DM_MMC_OPS migration, the .set_ios callback can
return an integer now. Return an appropriate error value rather
than sudden death by BUG().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
No more reason to define this function above the ops structure.
Move it near the caller. Also, change its return type to void
because it never fails.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Catch up with the DM migration.
As struct dm_mmc_ops does not have .init callback, call the init
function directly from the probe function.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
If we do nand device 0 command in u-boot on a device that has NAND support
enabled but no NAND chip, we can get data abort at least on omaps.
Fix the issue by replacing the check with nand_info[dev] as
suggested by Scott Wood. The check for name existed before because before
the array-to-pointer conversion there was no way to directly test
nand_info[dev] for emptiness.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The page table is maintained by the CPU, hence it is safe to always
align cache flush to a whole cache line size. This allows to use
mmu_page_table_flush for a single page table, e.g. when configure
only small regions through mmu_set_region_dcache_behaviour.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Add LPAE support for mmu_set_region_dcache_behaviour. The function
is in use in some LPAE capable board such TI DRA7xx or NXP i.MX 7.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
The H3 PLL5 used for DRAM barely manages to lock to the required
frequency before DRAM controller starts, sometimes leading to wrong
delay-line calibration results.
This patch changes the PLL tuning parameters to the same values as
boot0 used, which speeds up the locking and fixes the problem.
Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
When the backlight's pwm input is connected to a pwm output of the SoC,
actually use pwm to drive the backlight.
The mean reason for doing this is to fix the backlight turning off
for aprox. 1 second while the kernel is booting. This is caused by
the kernel actually using pwm to drive the backlight, so that it
can dim the backlight. First the pwm driver loads and switches the
pinmux for the pin driving the backlight's pwm input to the pwm
controller. Then about 1s later the actual backlight driver loads
and tells the pwm driver to actually update the pwm settings, which
have a power-on-reset value of "off".
An additional advantage is that this allows us to initatiate the
backlight at 80%, which is the kernel default, avoiding a brightness
change while the kernel loads.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed by: Peter Korsgaard <peter@korsgaard.com>
Add a defconfig and dts file for the Empire Electronix M712 tablet, this
is a 7" A13 tablet, with micro-usb (otg), headphone and micro-sd slots on
the outside. It uses a Goodix gt811 touchscreen controller, a RTL8188CTV
wifi chip and a DMART06 (1238a4) accelerometer.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Sync dts files with the current (Aug 18th 2016) state of Maxime's
linux/sunxi/for-next repo.
Note this commit also updates configs/MSI_Primo81_defconfig,
adding: "# CONFIG_REQUIRE_SERIAL_CONSOLE is not set", this is necessary
because the tablet does not have a reachable uart so the dts sync
drops its serial0 alias.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add a defconfig and dts file for tablets using the generic inet-q972 PCB.
Tablets with this PCB feature a mini-hdmi output, micro-usb usb-host,
micro-usb usb-otg, 3.5mm headphone jack, a micro sd slot,
(mini) power-barrel and an usb wifi module.
This has been tested on a 9.7" 1024x768 qware qw tb9718-qhd tablet.
The dts files are identical to the ones submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Commit f4db6c976c ("arm: mvebu: Add runtime detection of UART (xmodem)
boot-mode") added a change to hdr->destaddr when dynamically patching an
image for UART boot mode. With this change, kwboot ceases to work on
Kirkwood.
Thus, let's change hdr->destaddr only when we are patching an image with
header version 1 (Orion and Kirkwood use header version 0).
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Fixes: f4db6c976c ("arm: mvebu: Add runtime detection of UART (xmodem) boot-mode")
Cc: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ensure appropriate error messages are generated. Previously all errors
indicated that the serdes was already in use. Now appropriate error
messages are given.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
As of commit 88e34e5 ("spl: replace CONFIG_SPL_SPI_* with
CONFIG_SF_DEFAULT_*") these defines are not used. Remove them to avoid
confusion.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The NAND interface on the Armada-38x series is similar to that on the
Armada-XP. The key difference is that the NAND ECC clock ratio is
provided via the DFX Server registers instead of the Core Clock.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Patch f8a10ed1 [i2c: mvtwsi: Make address length variable] accidentally
inverted the sequence of address bytes sent to the I2C device. This
patch corrects this by sending the highest byte first and the lowest
byte last again.
Tested on theadorable Armada-XP board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Heiko Schocher <hs@denx.de>
In tegra20_slink.c, the set_mode() function may be executed before the
SPI bus is claimed the first time, and hence the clocks to the SPI
controller may not be running. If so, any register read/write at this
time will hang the CPU. Fix this by ensuring the clock is running as soon
as the driver is probed. This is observed on the Tegra30 Beaver board.
Apply the same clock initialization fix to all other Tegra SPI drivers so
that if set_mode() is ever implemented there, the same bug will not appear.
Note that tegra114_spi.c already operates in this fashion.
The clock manipulation code is copied from claim_bus() to probe() rather
than moved. This ensures that any calls to set_speed() take effect; the
clock can't be set once during probe and left unchanged.
Fixes: 5cb1b7b395 ("spi: tegra20: Add support for mode selection")
Cc: Mirza Krak <mirza.krak@hostmobility.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The nvidia,bpmp property is left over from an old BPMP I2C binding, and
shouldn't be present. Remove it from the SoC DT file, and update the
I2C driver not to parse it; the value wasn't used for anything any more
anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The Tegra SDHCI binding dictates that the reseet name for the Tegra SDHCI
clock be "sdhci" not "sdmmc", and that the clock is accessed by index
rather than by name. Fix the Tegra186 DT and MMC driver to honor this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The Tegra I2C binding dictates that the clock name for the Tegra I2C clock
be "div-clk" not "i2c". Fix the Tegra186 DT and I2C driver to honor this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The fs-test.sh script expected there to be a \n\r style newline at the
end of the output. This is no longer the case, so use 'tr' to remove the
\r that we get.
Fixes: (c5917b4b05 "dm: serial-uclass: Move a carriage return before a
line feed")
Signed-off-by: Tom Rini <trini@konsulko.com>
When phy autoneg on, the link speed and duplex should be
determined by phy advertising register and
phy link partner ability register.
Check phy advertising register when geting phy link speed and
duplex if autoneg on.
Signed-off-by: Dongpo Li <lidongpo@hisilicon.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The spatch series converting legacy drivers from miiphy_register to
mdio_register changed the return convention of the davinci_emac internal
MDIO accessors, making the internal code relying on it misbehaving:
no mdiodev get registered and U-Boot crashes when using net cmds in the
context of the old legacy net API.
ATM davinci_emac_initialize and cpu_eth_init don't return a proper value
in that case but fixing them would not avoid the crash.
This change is just a follow-up to the spatch pass, the MDIO accessors
of the mdiodev introduced by the spatch pass retain their proper values.
Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The QMan is not used in FMan IM mode, so no QMI enqueue or QMI
dequeue are performed.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
