Reinhard Pfau a119357c43 strider: use optimised bus timing for FPGA access ...

Use optimised bus timing for FPGA access.

Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>

2016-03-21 09:20:37 +01:00

19 KiB

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